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{{otheruses|OneAPI (disambiguation)}}
{{otheruses|OneAPI (disambiguation)}}
'''one-API''' is an [[open standard]], adopted by Intel,{{sfn|Fortenberry|Tomov|2022|p=22}} for a unified [[application programming interface]] (API) intended to be used across different computing [[Hardware acceleration|accelerator]] ([[coprocessor]]) architectures, including [[GPU]]s, [[AI accelerator]]s and [[field-programmable gate array]]s. It is an open, cross-industry, standards-based, unified, multi-architecture, multi-vendor programming model that delivers a common developer experience across accelerator architectures - for faster application performance, more productivity, and greater innovation. The one-API initiative encourages collaboration on the one-API specification and compatible one-API implementations across the ecosystem. It is intended to eliminate the need for developers to maintain separate code bases, multiple programming languages, tools, and workflows for each architecture.<ref>{{Cite web|url=https://www.hpcwire.com/2019/12/09/intel-expands-its-silicon-portfolio-and-oneapi-software-initiative-for-next-generation-hpc/|title=Intel Expands its Silicon Portfolio, and oneAPI Software Initiative for Next-Generation HPC|date=2019-12-09|website=HPCwire|language=en-US|access-date=2020-02-11}}</ref><ref>{{Cite web|url=https://www.hpcwire.com/2019/11/17/intel-debuts-new-gpu-ponte-vecchio-and-outlines-aspirations-for-oneapi/|title=Intel Debuts New GPU – Ponte Vecchio – and Outlines Aspirations for oneAPI|date=2019-11-18|website=HPCwire|language=en-US|access-date=2020-02-11}}</ref><ref>{{Cite web|url=https://www.extremetech.com/computing/302284-sc19-intel-unveils-new-gpu-stack-oneapi-development-effort|title=SC19: Intel Unveils New GPU Stack, oneAPI Development Effort - ExtremeTech|website=www.extremetech.com|access-date=2020-02-11}}</ref><ref>{{Cite web|url=https://www.servethehome.com/intel-one-api-to-rule-them-all-is-much-needed/|title=Intel One API to Rule Them All Is Much Needed to Expand TAM|last=Kennedy|first=Patrick|date=2018-12-24|website=ServeTheHome|language=en-US|access-date=2020-02-11}}</ref>
'''oneAPI''' is an [[open standard]], adopted by Intel,{{sfn|Fortenberry|Tomov|2022|p=22}} for a unified [[application programming interface]] (API) intended to be used across different computing [[Hardware acceleration|accelerator]] ([[coprocessor]]) architectures, including [[GPU]]s, [[AI accelerator]]s and [[field-programmable gate array]]s. It is intended to eliminate the need for developers to maintain separate code bases, multiple programming languages, tools, and workflows for each architecture.<ref>{{Cite web|url=https://www.hpcwire.com/2019/12/09/intel-expands-its-silicon-portfolio-and-oneapi-software-initiative-for-next-generation-hpc/|title=Intel Expands its Silicon Portfolio, and oneAPI Software Initiative for Next-Generation HPC|date=2019-12-09|website=HPCwire|language=en-US|access-date=2020-02-11}}</ref><ref>{{Cite web|url=https://www.hpcwire.com/2019/11/17/intel-debuts-new-gpu-ponte-vecchio-and-outlines-aspirations-for-oneapi/|title=Intel Debuts New GPU – Ponte Vecchio – and Outlines Aspirations for oneAPI|date=2019-11-18|website=HPCwire|language=en-US|access-date=2020-02-11}}</ref><ref>{{Cite web|url=https://www.extremetech.com/computing/302284-sc19-intel-unveils-new-gpu-stack-oneapi-development-effort|title=SC19: Intel Unveils New GPU Stack, oneAPI Development Effort - ExtremeTech|website=www.extremetech.com|access-date=2020-02-11}}</ref><ref>{{Cite web|url=https://www.servethehome.com/intel-one-api-to-rule-them-all-is-much-needed/|title=Intel One API to Rule Them All Is Much Needed to Expand TAM|last=Kennedy|first=Patrick|date=2018-12-24|website=ServeTheHome|language=en-US|access-date=2020-02-11}}</ref>


== Specification ==
== The oneAPI specification ==
The oneAPI specification extends existing developer programming models to enable multiple hardware architectures through a data-parallel language, a set of library APIs, and a low-level hardware interface to support cross-architecture programming. It builds upon industry standards and provides an open, cross-platform developer stack.<ref name="spec">{{cite web |url=https://www.oneapi.io/spec/ |title=oneAPI Specification |last= |first= |date= |website=oneAPI |archive-url= |archive-date= |access-date=}}</ref><ref>{{Cite web|date=2021-03-23|title=Preparing for the Arrival of Intel's Discrete High-Performance GPUs|url=https://www.hpcwire.com/2021/03/23/preparing-for-the-arrival-of-intels-discrete-high-performance-gpus/|access-date=2021-03-29|website=HPCwire|language=en-US}}</ref>
The oneAPI specification extends existing developer programming models to enable multiple hardware architectures through a data-parallel language, a set of library APIs, and a low-level hardware interface to support cross-architecture programming. It builds upon industry standards and provides an open, cross-platform developer stack.<ref name="spec">{{cite web |url=https://www.oneapi.io/spec/ |title=oneAPI Specification |last= |first= |date= |website=oneAPI |archive-url= |archive-date= |access-date=}}</ref><ref>{{Cite web|date=2021-03-23|title=Preparing for the Arrival of Intel's Discrete High-Performance GPUs|url=https://www.hpcwire.com/2021/03/23/preparing-for-the-arrival-of-intels-discrete-high-performance-gpus/|access-date=2021-03-29|website=HPCwire|language=en-US}}</ref>


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[[Intel_C%2B%2B_Compiler|DPC++]]<ref>{{Cite web|url=https://www.apress.com/gp/data-parallel-c-advanced-chapters-just-released/17382670|title=Data Parallel C++: Mastering DPC++ for Programming of Heterogeneous Systems Using C++ and SYCL|last=|first=|date=|website=Apress|archive-url=|archive-date=|access-date=}}</ref><ref>{{Cite web|url=https://insidebigdata.com/2019/12/16/heterogeneous-computing-programming-oneapi-and-data-parallel-c/|title=Heterogeneous Computing Programming: oneAPI and Data Parallel C++|last=Team|first=Editorial|date=2019-12-16|website=insideBIGDATA|language=en-US|access-date=2020-02-11}}</ref> is an open, cross-architecture language built upon the [[ISO C++]] and [[Khronos Group]] [[SYCL]] standards.<ref>{{Cite web|url=https://www.khronos.org/news/permalink/intels-one-api-project-incorporates-sycl|title=The Khronos Group|date=2020-02-11|website=The Khronos Group|language=en|access-date=2020-02-11}}</ref> DPC++ is an implementation of SYCL with extensions that are proposed for inclusion in future revisions of the SYCL standard. An example of this is the contribution of unified shared memory, group algorithms, and sub-groups to SYCL 2020.<ref>{{Cite web|date=2020-06-30|title=Khronos Steps Towards Widespread Deployment of SYCL with Release of SYCL 2020 Provisional Specification|url=https://www.khronos.org/news/press/khronos-releases-sycl-2020-provisional-specification|access-date=2020-07-06|website=The Khronos Group|language=en}}</ref><ref>{{Cite web|last=staff|date=2020-06-30|title=New, Open DPC++ Extensions Complement SYCL and C++|url=https://insidehpc.com/2020/06/new-open-dpc-extensions-complement-sycl-and-c/|access-date=2020-07-06|website=insideHPC|language=en-US}}</ref><ref>{{Cite web|date=2021-02-09|title=SYCL 2020 Launches with New Name, New Features, and High Ambition|url=https://www.hpcwire.com/2021/02/09/sycl-2020-launches-new-name-new-features/|access-date=2021-02-16|website=HPCwire|language=en-US}}</ref>
[[Intel_C%2B%2B_Compiler|DPC++]]<ref>{{Cite web|url=https://www.apress.com/gp/data-parallel-c-advanced-chapters-just-released/17382670|title=Data Parallel C++: Mastering DPC++ for Programming of Heterogeneous Systems Using C++ and SYCL|last=|first=|date=|website=Apress|archive-url=|archive-date=|access-date=}}</ref><ref>{{Cite web|url=https://insidebigdata.com/2019/12/16/heterogeneous-computing-programming-oneapi-and-data-parallel-c/|title=Heterogeneous Computing Programming: oneAPI and Data Parallel C++|last=Team|first=Editorial|date=2019-12-16|website=insideBIGDATA|language=en-US|access-date=2020-02-11}}</ref> is an open, cross-architecture language built upon the [[ISO C++]] and [[Khronos Group]] [[SYCL]] standards.<ref>{{Cite web|url=https://www.khronos.org/news/permalink/intels-one-api-project-incorporates-sycl|title=The Khronos Group|date=2020-02-11|website=The Khronos Group|language=en|access-date=2020-02-11}}</ref> DPC++ is an implementation of SYCL with extensions that are proposed for inclusion in future revisions of the SYCL standard. An example of this is the contribution of unified shared memory, group algorithms, and sub-groups to SYCL 2020.<ref>{{Cite web|date=2020-06-30|title=Khronos Steps Towards Widespread Deployment of SYCL with Release of SYCL 2020 Provisional Specification|url=https://www.khronos.org/news/press/khronos-releases-sycl-2020-provisional-specification|access-date=2020-07-06|website=The Khronos Group|language=en}}</ref><ref>{{Cite web|last=staff|date=2020-06-30|title=New, Open DPC++ Extensions Complement SYCL and C++|url=https://insidehpc.com/2020/06/new-open-dpc-extensions-complement-sycl-and-c/|access-date=2020-07-06|website=insideHPC|language=en-US}}</ref><ref>{{Cite web|date=2021-02-09|title=SYCL 2020 Launches with New Name, New Features, and High Ambition|url=https://www.hpcwire.com/2021/02/09/sycl-2020-launches-new-name-new-features/|access-date=2021-02-16|website=HPCwire|language=en-US}}</ref>


== oneAPI libraries ==
== Libraries ==
The set of APIs<ref name="spec" /> spans several domains, including libraries for linear algebra, deep learning, machine learning, video processing, and others.
The set of APIs<ref name="spec" /> spans several domains, including libraries for linear algebra, deep learning, machine learning, video processing, and others.
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Revision as of 18:17, 24 January 2024

oneAPI
Repositorygithub.com/oneapi-src
Operating systemCross-platform
PlatformCross-platform
TypeOpen-source software specification for parallel programming
Websitewww.oneapi.io Edit this at Wikidata
For other uses, see OneAPI (disambiguation).

oneAPI is an open standard, adopted by Intel,[1] for a unified application programming interface (API) intended to be used across different computing accelerator (coprocessor) architectures, including GPUs, AI accelerators and field-programmable gate arrays. It is intended to eliminate the need for developers to maintain separate code bases, multiple programming languages, tools, and workflows for each architecture.[2][3][4][5]

Specification

The oneAPI specification extends existing developer programming models to enable multiple hardware architectures through a data-parallel language, a set of library APIs, and a low-level hardware interface to support cross-architecture programming. It builds upon industry standards and provides an open, cross-platform developer stack.[6][7]

Data Parallel C++

DPC++[8][9] is an open, cross-architecture language built upon the ISO C++ and Khronos Group SYCL standards.[10] DPC++ is an implementation of SYCL with extensions that are proposed for inclusion in future revisions of the SYCL standard. An example of this is the contribution of unified shared memory, group algorithms, and sub-groups to SYCL 2020.[11][12][13]

Libraries

The set of APIs[6] spans several domains, including libraries for linear algebra, deep learning, machine learning, video processing, and others.

Library Name Short

Name

Description
oneAPI DPC++ Library oneDPL Algorithms and functions to speed DPC++ kernel programming
oneAPI Math Kernel Library oneMKL Math routines including matrix algebra, FFT, and vector math
oneAPI Data Analytics Library oneDAL Machine learning and data analytics functions
oneAPI Deep Neural Network Library oneDNN Neural networks functions for deep learning training and inference
oneAPI Collective Communications Library oneCCL Communication patterns for distributed deep learning
oneAPI Threading Building Blocks oneTBB Threading and memory management template library
oneAPI Video Processing Library oneVPL Real-time video encode, decode, transcode, and processing

The source code of most implementations of the above libraries is available on GitHub.[14]

The oneAPI documentation also lists the "Level Zero" API defining the low-level direct-to-metal interfaces and a set of ray tracing components with its own APIs.[6]

Hardware abstraction layer

oneAPI Level Zero,[15][16][17] the low-level hardware interface, defines a set of capabilities and services that a hardware accelerator needs to interface with compiler runtimes and other developer tools.

Implementations

Intel has released production quality oneAPI toolkits that implement the specification and add CUDA code migration, analysis, and debug tools.[18][19][20] These include the Intel oneAPI DPC++/C++ Compiler,[21] Intel Fortran Compiler, Intel VTune Profiler[22] and multiple performance libraries.

Codeplay has released an open-source layer[23][24][25] to allow oneAPI and SYCL/DPC++ to run atop Nvidia GPUs via CUDA.

University of Heidelberg has developed a SYCL/DPC++ implementation for both AMD and Nvidia GPUs.[26]

Huawei released a DPC++ compiler for their Ascend AI Chipset[27]

Fujitsu has created an open-source ARM version of the oneAPI Deep Neural Network Library (oneDNN)[28] for their Fugaku CPU.

Applications

As of the end of 2022, the oneAPI was still new, with a dearth of academic papers on the application packages ported to use the API. Fortenberry and Tomov[1] list:

References

  1. ^ a b Fortenberry & Tomov 2022, p. 22.
  2. ^ "Intel Expands its Silicon Portfolio, and oneAPI Software Initiative for Next-Generation HPC". HPCwire. 2019-12-09. Retrieved 2020-02-11.
  3. ^ "Intel Debuts New GPU – Ponte Vecchio – and Outlines Aspirations for oneAPI". HPCwire. 2019-11-18. Retrieved 2020-02-11.
  4. ^ "SC19: Intel Unveils New GPU Stack, oneAPI Development Effort - ExtremeTech". www.extremetech.com. Retrieved 2020-02-11.
  5. ^ Kennedy, Patrick (2018-12-24). "Intel One API to Rule Them All Is Much Needed to Expand TAM". ServeTheHome. Retrieved 2020-02-11.
  6. ^ a b c "oneAPI Specification". oneAPI.
  7. ^ "Preparing for the Arrival of Intel's Discrete High-Performance GPUs". HPCwire. 2021-03-23. Retrieved 2021-03-29.
  8. ^ "Data Parallel C++: Mastering DPC++ for Programming of Heterogeneous Systems Using C++ and SYCL". Apress.
  9. ^ Team, Editorial (2019-12-16). "Heterogeneous Computing Programming: oneAPI and Data Parallel C++". insideBIGDATA. Retrieved 2020-02-11.
  10. ^ "The Khronos Group". The Khronos Group. 2020-02-11. Retrieved 2020-02-11.
  11. ^ "Khronos Steps Towards Widespread Deployment of SYCL with Release of SYCL 2020 Provisional Specification". The Khronos Group. 2020-06-30. Retrieved 2020-07-06.
  12. ^ staff (2020-06-30). "New, Open DPC++ Extensions Complement SYCL and C++". insideHPC. Retrieved 2020-07-06.
  13. ^ "SYCL 2020 Launches with New Name, New Features, and High Ambition". HPCwire. 2021-02-09. Retrieved 2021-02-16.
  14. ^ "oneAPI-SRC". GitHub.
  15. ^ Verheyde 2019-12-08T16:11:19Z, Arne. "Intel Releases Bare-Metal oneAPI Level Zero Specification". Tom's Hardware. Retrieved 2020-02-11.{{cite web}}: CS1 maint: numeric names: authors list (link)
  16. ^ "Intel's Compute Runtime Adds oneAPI Level Zero Support - Phoronix". www.phoronix.com. Retrieved 2020-03-10.
  17. ^ "Initial Benchmarks With Intel oneAPI Level Zero Performance - Phoronix". www.phoronix.com. Retrieved 2020-04-13.
  18. ^ "Intel Champions XPU Vision With oneAPI, Data Center GPUs - SDxCentral". SDxCentral. 2020-11-11. Retrieved 2020-11-11.
  19. ^ "Intel Debuts oneAPI Gold and Provides More Details on GPU Roadmap". HPCwire. 2020-11-11. Retrieved 2020-11-11.
  20. ^ Moorhead, Patrick. "Intel Announces Gold Release Of OneAPI Toolkits And New Intel Server GPU". Forbes. Retrieved 2020-12-08.
  21. ^ "Data Parallel C++ for Cross-Architecture Applications". Intel. Retrieved 2021-10-07.
  22. ^ "Fix Performance Bottlenecks with Intel® VTune™ Profiler". Intel. Retrieved 2021-10-07.
  23. ^ "Codeplay Open Sources a Version of DPC++ for Nvidia GPUs". HPCwire. 2020-02-05. Retrieved 2020-02-12.
  24. ^ "Intel's oneAPI / DPC++ / SYCL Will Run Atop NVIDIA GPUs With Open-Source Layer - Phoronix". www.phoronix.com. Retrieved 2019-12-06.
  25. ^ "Codeplay - Codeplay contribution to DPC++ brings SYCL support for NVIDIA GPUs". www.codeplay.com. Retrieved 2020-02-11.
  26. ^ Salter, Jim (2020-09-30). "Intel, Heidelberg University team up to bring Radeon GPU support to AI". Ars Technica. Retrieved 2021-10-07.
  27. ^ Extending DPC++ with Support for Huawei Ascend AI Chipset, retrieved 2021-10-07
  28. ^ fltech. "A Deep Dive into a Deep Learning Library for the A64FX Fugaku CPU - The Development Story in the Developer's Own Words". fltech - 富士通研究所の技術ブログ (in Japanese). Retrieved 2021-02-10.

Sources

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