ARM big.LITTLE
ARM big.LITTLE is a heterogeneous computing architecture developed by ARM Holdings, coupling relatively battery-saving and slower processor cores (LITTLE) with relatively more powerful and power-hungry ones (big). Typically, only one "side" or the other will be active at once, but all cores have access to the same memory regions, so workloads can be swapped between Big and Little cores on the fly.[1] The intention is to create a multi-core processor that can adjust better to dynamic computing needs and use less power than clock scaling alone. ARM's marketing material promises up to a 75% savings in power usage for some activities.[2] Most commonly, ARM big.LITTLE architectures are used to create a multi-processor system-on-chip (MPSoC).
In October 2011, big.LITTLE was announced along with the Cortex-A7, which was designed to be architecturally compatible with the Cortex-A15.[3] In October 2012 ARM announced the Cortex-A53 and Cortex-A57 (ARMv8-A) cores, which are also intercompatible to allow their use in a big.LITTLE chip.[4] ARM later announced the Cortex-A12 at Computex 2013 followed by the Cortex-A17 in February 2014. Both the Cortex-A12 and the Cortex-A17 can also be paired in a big.LITTLE configuration with the Cortex-A7.[5][6]
The Problem that big.LITTLE Solves
For a given library of CMOS logic, active power increases as the logic switches more per second, while leakage increases with the number of transistors. So, CPUs designed to run fast are different from CPUs designed to save power. When a very fast out-of-order CPU is loafing at very low speeds, a CPU with much less leakage (fewer transistors) could do the same work. For example, it might use a smaller (fewer transistors) memory cache, or a simpler microarchitecture such as a pipeline. big.LITTLE is a way to optimize for both cases: Power and speed, in the same system.
In practice, a big.LITTLE system can be surprisingly inflexible. One issue is the number and types of power and clock domains that the IC provides. These may not match the standard power management features offered by an operating system. Another is that the CPUs no longer have equivalent abilities, and matching the right software task to the right CPU becomes more difficult. Most of these problems are being solved by making the electronics and software more flexible.
Run-state migration
There are three ways[7] for the different processor cores to be arranged in a big.LITTLE design, depending on the scheduler implemented in the kernel.[8]
Clustered switching
The clustered model approach is the first and simplest implementation, arranging the processor into identically-sized clusters of "big" or "LITTLE" cores. The operating system scheduler can only see one cluster at a time; when the load on the whole processor changes between low and high, the system transitions to the other cluster. All relevant data are then passed through the common L2 cache, the active core cluster is powered off and the other one is activated. A Cache Coherent Interconnect (CCI) is used. This model has been implemented in the Samsung Exynos 5 Octa (5410).[9]
In-kernel switcher (CPU migration)
CPU migration via the in-kernel switcher (IKS) involves pairing up a 'big' core with a 'LITTLE' core, with possibly many identical pairs in one chip. Each pair operates as one so-termed virtual core, and only one real core is (fully) powered up and running at a time. The 'big' core is used when the demand is high and the 'LITTLE' core is employed when demand is low. When demand on the virtual core changes (between high and low), the incoming core is powered up, running state is transferred, the outgoing is shut down, and processing continues on the new core. Switching is done via the cpufreq framework. A complete big.LITTLE IKS implementation was added in Linux 3.11. big.LITTLE IKS is an improvement of cluster migration (§ Clustered switching), the main difference being that each pair is visible to the scheduler.
A more complex arrangement involves a non-symmetric grouping of 'big' and 'LITTLE' cores. A single chip could have one or two 'big' cores and many more 'LITTLE' cores, or vice versa. Nvidia created something similar to this with the low-power 'companion core' in their Tegra 3 System-on-Chip.
Heterogeneous multi-processing (global task scheduling)
The most powerful use model of big.LITTLE architecture is Heterogeneous Multi-Processing (HMP), which enables the use of all physical cores at the same time. Threads with high priority or computational intensity can in this case be allocated to the "big" cores while threads with less priority or less computational intensity, such as background tasks, can be performed by the "LITTLE" cores.[10][11]
This model has been implemented in the Samsung Exynos starting with the Exynos 5 Octa series (5420, 5422, 5430),[12][13] and Apple mobile application processors starting with the Apple A11.[14]
Scheduling
The paired arrangement allows for switching to be done transparently to the operating system using the existing dynamic voltage and frequency scaling (DVFS) facility. The existing DVFS support in the kernel (e.g. cpufreq
in Linux) will simply see a list of frequencies/voltages and will switch between them as it sees fit, just like it does on the existing hardware. However, the low-end slots will activate the 'Little' core and the high-end slots will activate the 'Big' core.
Alternatively, all the cores may be exposed to the kernel scheduler, which will decide where each process/thread is executed. This will be required for the non-paired arrangement but could possibly also be used on the paired cores. It poses unique problems for the kernel scheduler, which, at least with modern commodity hardware, has been able to assume all cores in a SMP system are equal rather than heterogeneous.
Advantages of global task scheduling
- Finer-grained control of workloads that are migrated between cores. Because the scheduler is directly migrating tasks between cores, kernel overhead is reduced and power savings can be correspondingly increased.
- Implementation in the scheduler also makes switching decisions faster than in the cpufreq framework implemented in IKS.
- The ability to easily support non-symmetrical clusters (e.g. with 2 Cortex-A15 cores and 4 Cortex-A7 cores).
- The ability to use all cores simultaneously to provide improved peak performance throughput of the SoC compared to IKS.
Implementations
SoC | Fabrication | Big cores | Medium cores | Little cores | GPU | Memory interface | Wireless radio technologies | Availability | Devices |
---|---|---|---|---|---|---|---|---|---|
HiSilicon K3V3 | 28 nm | 1.8 GHz dual-core Cortex-A15 | — | 1.2 GHz dual-core Cortex-A7 | Mali-T658 | H2 2013 | |||
HiSilicon Kirin 710 | 12 nm FinFET | 2.2 GHz quad-core Cortex-A73 | — | 1.7 GHz quad-core Cortex-A53 | Mali-G51 MP4 | LTE Cat.12 (600 Mbit/s) | Q3 2018 | List
| |
HiSilicon Kirin 810 | 7 nm FinFET | 2.2 GHz dual-core Cortex-A76 | — | 1.9 GHz hexa-core Cortex-A55 | Mali-G52 MP6 | LPDDR4X | Q2 2019 | List
| |
HiSilicon Kirin 920 | 28 nm | 1.7-2.0 GHz quad-core Cortex-A15 | — | 1.3-1.6 GHz quad-core Cortex-A7 | Mali-T628 MP4 | LPDDR3 | LTE Cat 6 | Q3 2014 | Huawei Honor 6 |
HiSilicon Kirin 950/955 | 16 nm FinFET+ | 2.3-2.5 GHz quad-core ARM Cortex-A72 | — | 1.8 GHz quad-core ARM Cortex-A53 | Mali-T880 MP4 | LPDDR4 | LTE Cat 6 | Q4 2015 (Kirin 950)
Q2 2016 (Kirin 955) |
Huawei Mate 8, Huawei P9, Huawei Honor 8 |
HiSilicon Kirin 960 | 16 nm FinFET Compact | 2.36 GHz quad-core ARM Cortex-A73 | — | 1.84 GHz quad-core ARM Cortex-A53 | Mali-G71 MP8 | LPDDR4-1600 Dual-Channel 64-Bit (28.8GB/s) | LTE Cat 12/13 | Q4 2016 | List
|
Hisilicon Kirin 970 | 10 nm FinFET+ | 2.36 GHz Quad-Core ARM Cortex-A73 | — | 1.84 GHz Quad-Core ARM Cortex-A53 | Mali-G72 MP12 @746MHz | LPDDR4X-1866 Quad-Channel 64-Bit (29.8GB/s) | LTE Cat.18/13 | Q4 2017 | List
|
Hisilicon Kirin 980
(DynamIQ) |
7nm FinFET | 2.6 GHz Dual-Core ARM Cortex-A76 | 1.92 GHz Dual-Core ARM Cortex-A76 | 1.8 GHz Quad-Core ARM Cortex-A55 | Mali-G76 MP10 @720MHz | LPDDR4X-2133 Quad-Channel 64-Bit (34.1GB/s) | LTE Cat.21/13 | Q4 2018 | List
|
Hisilicon Kirin 990
(DynamIQ) |
7nm FinFET | 2.86 GHz Dual-Core Cortex-A76 | 2.09 GHz Dual-Core Cortex-A76 | 1.86 GHz Dual-Core Cortex-A55 | Mali-G76 MP16 @600MHz | LPDDR4X-2133 Quad-Channel 64-Bit (34.1GB/s) | Balong 765 (Cat.19/13) | Q4 2019 | List
|
Hisilicon Kirin 990 5G
(DynamIQ) |
7nm+ FinFET EUV | 2.86 GHz Dual-Core Cortex-A76 | 2.36 GHz Dual-Core Cortex-A76 | 1.95 GHz Dual-Core Cortex-A55 | Mali-G76 MP16 @600MHz | LPDDR4X-2133 Quad-Channel 64-Bit (34.1GB/s) | Balong 5000 (Sub-6GHz Only) | Q4 2019 | List
|
Samsung Exynos 5 Octa (5410 model)[15][16] | 28 nm | 1.6-1.8 GHz quad-core Cortex-A15 | — | 1.2 GHz quad-core Cortex-A7 | PowerVR SGX544MP3 | 32-bit dual-channel 800 MHz LPDDR3 (12.8 GB/sec) | Q2 2013 | Exynos 5-based Samsung Galaxy S4 | |
Samsung Exynos 5 Octa (5420 model)[17] | 28 nm | 1.8-2.0 GHz quad-core Cortex-A15 | — | 1.3 GHz quad-core Cortex-A7 | Mali-T628 MP6 | 32-bit dual-channel 933 MHz LPDDR3e (14.9 GB/sec) | Q4 2013 | Exynos 5-based Samsung Galaxy Note 3 | |
Samsung Exynos 5 Octa (5422 model)[13] | 28 nm | 2.1 GHz quad-core Cortex-A15 | — | 1.5 GHz quad-core Cortex-A7 | Mali-T628 MP6 | 32-bit dual-channel 933 MHz LPDDR3e (14.9 GB/sec) | Q2 2014 | Exynos 5-based Samsung Galaxy S5, Odroid-XU3, Odroid-XU4 | |
Samsung Exynos 5 Hexa (5260 model)[13] | 28 nm | 1.7 GHz dual-core Cortex-A15 | — | 1.3 GHz quad-core Cortex-A7 | Mali-T624 | 32-bit dual-channel 800 MHz LPDDR3e (12.8 GB/sec) | Q2 2014 | Samsung Galaxy Note 3 Neo | |
Samsung Exynos 5 Octa (5430 model)[18] | 20 nm | 1.8 GHz quad-core Cortex-A15 | — | 1.3 GHz quad-core Cortex-A7 | Mali-T628 MP6 | 32-bit dual-channel 1066 MHz LPDDR3e (17.0 GB/sec) | LTE Cat 6 | Q3 2014 | Samsung Galaxy Alpha[19] |
Samsung Exynos 7 Octa (5433 model)[20] | 20 nm | 1.9 GHz quad-core Cortex-A57 | — | 1.3 GHz quad-core Cortex-A53 | Mali-T760 MP6 | 32-bit dual-channel 825 MHz LPDDR3e (13.2 GB/sec) | LTE Cat 6 | Q4 2014 | Samsung Galaxy Note 4 (SM-N910C) |
Samsung Exynos 7 Octa (7420 model)[21] | 14 nm | 2.1 GHz quad-core Cortex-A57 | — | 1.5 GHz quad-core Cortex-A53 | Mali-T760 MP8 | LPDDR4 | LTE Cat 9 | Q2 2015 | Samsung Galaxy S6, Samsung Galaxy S6 Edge, Samsung Galaxy Note 5, Meizu PRO 5 |
Samsung Exynos 7 Octa (7580 model) | 28 nm HKMG | 1.5 GHz quad-core Cortex-A53 | — | 1.5 GHz quad-core Cortex-A53 | Mali-T720 MP2 | LPDDR3 | LTE Cat 6 | Q2 2015 | Samsung Galaxy J7, Samsung Galaxy S5 Neo, Samsung Galaxy A5/A7 (2016) |
Samsung Exynos 7 Hexa (7650 model) | 28 nm HKMG | 1.7 GHz dual-core Cortex-A72 | — | 1.3 GHz quad-core Cortex-A53 | Mali-T820 MP3 | LPDDR3 | LTE Cat 6 | Q1 2016 | |
Samsung Exynos 7 Octa (7870 model) | 14 nm LPP | 1.7 GHz quad-core Cortex-A53 | — | 1.7 GHz quad-core Cortex-A53 | Mali-T830 MP2 | LPDDR3 | LTE Cat 6 | Q2 2016 | List
|
Samsung Exynos 7 Octa (7880 model) | 14 nm LPP | 1.9 GHz quad-core Cortex-A53 | — | 1.9 GHz quad-core Cortex-A53 | Mali-T830 MP3 | LPDDR3 | LTE Cat 7 | Q2 2016 | Samsung Galaxy A5 (2017), Samsung Galaxy A7 (2017) |
Samsung Exynos 7 Octa (7884 model) | 14 nm LPP | 1.6 GHz dual-core Cortex-A73 | — | 1.35 GHz hexa-core Cortex-A53 | Mali-G71 MP2 | LPDDR4 | Downlink: LTE Cat 12, Uplink: LTE Cat 13 | Q2 2018 | List
|
Samsung Exynos 7 Octa (7885 model) | 14 nm LPP | 2.2 GHz dual-core Cortex-A73 | — | 1.6 GHz hexa-core Cortex-A53 | Mali-G71 MP2 | LPDDR4 | Downlink: LTE Cat 12, Uplink: LTE Cat 13 | Q1 2018 | Samsung Galaxy A8 (2018), Samsung Galaxy A8+ (2018) |
Samsung Exynos 7 Octa (7904 model) | 14 nm LPP | 1.8 GHz dual-core Cortex-A73 | — | 1.6 GHz hexa-core Cortex-A53 | Mali-G71 MP2 | LPDDR4 | Downlink: LTE Cat 12, Uplink: LTE Cat 13 | Q1 2019 | List
|
Samsung Exynos 8 Octa (8890 model) | 14 nm LPP | 2.6 GHz quad-core M1 "Mongoose" | — | 1.6 GHz quad-core Cortex-A53 | Mali-T880 MP12 | LPDDR4 | Downlink: LTE Cat 12, Uplink: LTE Cat 13 | Q1 2016 | Samsung Galaxy S7 (930F/FD), Samsung Galaxy S7 Edge (935F/FD), Samsung Galaxy Note 7 (N930F/FD/G) |
Samsung Exynos 9 Octa (8895 model) | 10 nm FinFET LPE | 2.3 GHz Quad-Core Exynos M2 "Mongoose" | — | 1.7 GHz Quad-Core Cortex-A53 | Mali-G71 MP20 @546MHz | LPDDR4X-1794 Dual-Channel 64-Bit (28.7GB/s) | Shannon 355 LTE Downlink: LTE Cat 16,
Uplink: LTE Cat 13 |
Q1 2017 | Samsung Galaxy S8 (950F/FD), Samsung Galaxy S8+ (955F/FD), Samsung Galaxy Note 8 (N950F/FD) |
Samsung Exynos 9 Octa (9609 Model) | 10 nm FinFET LPE | 2.2 GHz Quad-core Cortex-A73 | — | 1.6 GHz Quad-core Cortex-A53 | Mali-G72 MP3 | LPDDR4X 64-bit (2×32-bit) Dual-channel | Cat.12 3CA 600Mbit/s (DL) /
Cat.13 2CA 150Mbit/s (UL) |
Q2 2019 | Motorola One Vision, Motorola One Action |
Samsung Exynos 9 Octa (9610 Model) | 2.3 GHz Quad-core Cortex-A73 | — | 1.7 GHz Quad-core Cortex-A53 | Q4 2018 | Samsung Galaxy A50 | ||||
Samsung Exynos 9 Octa (9611 Model) | — | Q3 2019 | Samsung Galaxy A50s, Samsung Galaxy A51, Samsung Galaxy M30s, Samsung Galaxy Xcover Pro | ||||||
Samsung Exynos 9 Octa (9810 Model) | 10nm FinFET LPP | 2.9 GHz Quad-Core Exynos M3 "Meerkat" | — | 1.9 GHz Quad-Core Cortex-A55 | Mali-G72 MP18 @572MHz | LPDDR4X-1794 Quad-Channel 64-Bit (28.7GB/s) | Shannon 360 LTE Downlink: LTE Cat.18,
Uplink: LTE Cat.13 |
Q1 2018 | Samsung Galaxy S9 (SM-960F/DS), Samsung Galaxy S9+ (SM-965F/DS), Samsung Galaxy Note 9 (SM-N960F/DS), Samsung Galaxy Note 10 Lite (SM-N770F/DS) |
Samsung Exynos 9 Octa (9820 Model)
(DynamIQ) |
8nm LPP | 2.73 GHz Dual-Core Exynos M4 "Cheetah" | 2.31 GHz Dual-Core Cortex-A75 | 1.95 GHz Quad-Core Cortex-A55 | Mali-G76 MP12 @702MHz | LPDDR4X-2093 Quad-Channel 64-Bit (33.488GB/s) | Shannon 5000 LTE Downlink: LTE Cat.20,
Uplink: LTE Cat.13 |
Q1 2019 | Samsung Galaxy S10 (SM-G973F/DS), Samsung Galaxy S10+ (SM-G975F/DS), Samsung Galaxy S10e (SM-G970F/DS) |
Samsung Exynos 9 Octa (9825 Model)
(DynamIQ) |
7nm+ FinFET EUV | 2.73 GHz Dual-Core Exynos M4 "Cheetah" | 2.4 GHz Dual-Core Cortex-A75 | 1.95 Ghz Quad-Core Cortex-A55 | Mali-G76 MP12 | LPDDR4X-2093 Quad-Channel 64-Bit (33.488GB/s) | Shannon 5000 LTE Downlink: LTE Cat.20,
Uplink: LTE Cat.13 |
Q3 2019 | Samsung Galaxy Note 10 (SM-N970F/DS), Samsung Galaxy Note 10 5G (SM-N971F/DS), Samsung Galaxy Note 10+ (SM-N975F/DS), Samsung Galaxy Note 10+ 5G (SM-N976F/DS) |
Exynos 9 Octa (980 Model)
(DynamIQ) |
8nm FinFET LPP | 2.2 GHz Dual-Core Cortex-A77 | — | 1.8 GHz Hexa-Core Cortex-A55 | Mali-G76 MP5 | LPDDR4X-2093 Quad-Channel 64-Bit (33.488GB/s) | Shannon 5G
LTE Downlink: LTE Cat.16 LTE Uplink: LTE Cat.18 NR: Sub-6GHz |
Q3 2019 | Vivo X30/X30 Pro |
Exynos 9 Octa (990 Model)
(DynamIQ) |
7nm+ FinFET EUV | Dual-Core "Exynos M5" | Dual-Core Cortex-A76 | Quad-Core Cortex-A55 | Mali-G77 MP11 | LPDDR5-2750 Quad-Channel 64-Bit (44GB/s) | External: Exynos 5123 Modem NSA/SA
LTE Downlink: LTE Cat.24 LTE Uplink: LTE Cat.22 NR: Sub-6GHz, mmWave |
Q4 2019 | |
Renesas Mobile MP6530[22] | 28 nm | 2.0 GHz dual-core Cortex-A15 | — | 1.0 GHz dual-core Cortex-A7 | PowerVR SGX544 | Dual-channel LPDDR3 | LTE Cat 4 | ||
Allwinner A80 Octa[23] | 28 nm | Quad-core Cortex-A15 | — | Quad-core Cortex-A7 | PowerVR G6230 | Dual-channel DDR3/DDR3L/LPDDR3 or LPDDR2[24] | |||
MediaTek MT6595[25] | 28 nm | 2.2 GHz quad-core Cortex-A17 | — | 1.7 GHz quad-core Cortex-A7 | PowerVR G6200 (600 MHz) | 32-bit dual-channel 933 MHz LPDDR3 (14.9 GB/sec) | LTE Cat 4 | Q2 2014 | |
MediaTek MT6595M | 28 nm | 2.0 GHz quad-core Cortex-A17 | — | 1.5 GHz quad-core Cortex-A7 | PowerVR G6200 (450 MHz) | 32-bit dual-channel 933 MHz LPDDR3 (14.9 GB/sec) | LTE Cat 4 | Q2 2014 | |
MediaTek MT6595 Turbo | 28 nm | 2.5 GHz quad-core Cortex-A17 | — | 1.7 GHz quad-core Cortex-A7 | PowerVR G6200 (600 MHz) | 32-bit dual-channel 933 MHz LPDDR3 (14.9 GB/sec) | LTE Cat 4 | Q3 2014 | |
MediaTek Helio P20 (MT6757) | 16nm FFC | 2.3 GHz quad-core Cortex-A53 | — | 1.6 GHz quad-core Cortex-A53 | Mali-T880 MP2 @ 900 MHz | 16-bit dual-channel 1600 MHz LPDDR4x (12.8 GB/sec) | Cat-6 | Q3 2016 | List
|
MediaTek Helio P25 (MT6757CD) | 2.6 GHz quad-core Cortex-A53 | — | Mali-T880 MP2 @ 1 GHz | Q2 2017 | List
| ||||
MediaTek Helio P23 | 2.3/2.5 GHz quad-core Cortex-A53 | — | 1.65 GHz quad-core Cortex-A53 | Mali-G71 MP2 @ 770 MHz | Cat-6, Cat-7 DL / Cat-13 UL | Q3 2017 | List
| ||
MediaTek Helio P30 | 2.3 GHz quad-core Cortex-A53 | — | Mali-G71 MP2 @ 950 MHz + VPU | Cat-7 DL / Cat-13 UL | Gionee M7 | ||||
MediaTek Helio P60 (MT6771) | 12nm HPM | 2.0 GHz quad-core Cortex-A73 | — | 2.0 GHz quad-core Cortex-A53 | Mali-G72 MP3 @ 800 MHz | Dual-channel LPDDR4x @ 1800 MHz | Cat-7 (DL) / Cat-13 (UL) | Q1 2018 | List
|
MediaTek Helio P65 (MT6768) | 2.0 GHz dual-core Cortex-A75 | — | 2.0 GHz hexa-core Cortex-A55 | Mali-G52 MC2 @ 820 MHz | Up to 8GB, dual-channel LPDDR4x @ 1866 MHz | Cat-4, Cat-7 DL / Cat-13 UL | Q3 2019 | List
| |
MediaTek Helio P70 | 2.1 GHz quad-core Cortex-A73 | — | 2.0 GHz quad-core Cortex-A53 | Mali-G72 MP3 @ 900 MHz | Up to 8GB, dual-channel LPDDR4x @ 1800 MHz | Cat-7 (DL) / Cat-13 (UL) | Q4 2018 | List
| |
MediaTek Helio P90 | 12nm FinFET+ | 2.2 GHz dual-core Cortex-A75 | — | 2.0 GHz hexa-core Cortex-A55 | PowerVR GM9446 @ 970 MHz | Up to 8GB, Dual-channel LPDDR4x @ 1866 MHz | Cat-12 (DL) / Cat-13 (UL) | Q1 2019 | Oppo Reno Z, Oppo Reno2 Z |
MediaTek Helio G70 | 12nm FFC | 2.0 GHz dual-core Cortex-A75 | — | 1.7 GHz hexa-core Cortex-A55 | Mali-G52 MC2 @ 820 MHz | Cat-7 (DL) / Cat-13 (UL) | Q2 2020 | Realme C3 | |
MediaTek Helio G80 | — | Mali-G52 MC2 @ 950 MHz | |||||||
MediaTek Helio G90 | 2.05 GHz dual-core Cortex-A76 | — | 2.0 GHz hexa-core Cortex-A55 | Mali-G76 MC4 @ 720 MHz | Up to 10GB, Dual-channel LPDDR4x @ 2133 MHz | Cat-12 (DL) / Cat-13 (UL) | Q3 2019 | ||
MediaTek Helio G90T (MT5785V) | — | Mali-G76 MC4 @ 800 MHz | Redmi Note 8 Pro | ||||||
MediaTek Dimensity 800 | 7nm N7 | 2 GHz Quad-Core Cortex-A76 | — | 2 GHz Quad-Core Cortex-A55 | Mali-G57 MC4 | LPDDR4X-1866 Dual-Channel 32-Bit (17.1GB/s) | 2G/3G/4G/5G Multi Mode NSA/SA
NR : Sub-6GHz 2CC CA, mmWave |
Q2 2020 | |
MediaTek Dimensity 1000 | 2.6 GHz Quad-Core Cortex-A77 | — | Mali-G77 MP9 | LPDDR4X-1866 Quad-Channel 64-Bit (29.8GB/s) | Q1 2020 | Oppo Reno3 | |||
Qualcomm Snapdragon 439 (SDM439) | 12 nm FinFET | 1.9 GHz Quad-core ARM Cortex-A53 | — | 1.45 GHz Quad-core ARM Cortex-A53 | Adreno 505 | LPDDR3 Single-channel 933 MHz | Download: Cat 7, up to 300 Mbit/s; Upload: Cat 13, up to 150 Mbit/s | Q2 2018 | List
|
Qualcomm Snapdragon 415 (MSM8929)[26] | 28 nm | 1.4 GHz Quad-core ARM Cortex-A53 | — | 998 MHz Quad-core ARM Cortex-A53 | Adreno 405 | 32-bit single-channel 667 MHz LPDDR3 | LTE Cat 4 | Q1 2015 | Lenovo Vibe K5 |
Qualcomm Snapdragon 615/616 (MSM8939/v2/v3)[27] | 1.5-1.7 GHz Quad-core ARM Cortex-A53 | — | 1.0-1.2 GHz Quad-core ARM Cortex-A53 | Q3 2014 | List
| ||||
Qualcomm Snapdragon 617 (MSM8952)[28] | 1.5 GHz Quad-core ARM Cortex-A53 | — | 1.2 GHz Quad-core ARM Cortex-A53 | 32-bit single-channel 933 MHz LPDDR3 | LTE Cat 7 | Q4 2015 | List
| ||
Qualcomm Snapdragon 650 (MSM8956)[29] | 1.8 GHz Dual-core ARM Cortex-A72 | — | 1.4 GHz Quad-core ARM Cortex-A53 | Adreno 510 | 32-bit dual-channel 933 MHz LPDDR3 | LTE Cat 7 | Q4 2015 | List
| |
Qualcomm Snapdragon 652 (MSM8976)[30] | 1.8 GHz Quad-core ARM Cortex-A72 | — | 1.4 GHz Quad-core ARM Cortex-A53 | LTE Cat 7 | Q4 2015 | List
| |||
Qualcomm Snapdragon 653 (MS8976 Pro)[31] | 1.95 GHz Quad-core ARM Cortex-A72 | — | 1.44 GHz Quad-core ARM Cortex-A53 | LTE Cat 7 | Q4 2016 | List
| |||
Qualcomm Snapdragon 630 (SDM630)[32] | 14 nm | 2.2 GHz Quad-core ARM Cortex-A53 | — | 1.8 GHz Quad-core ARM Cortex-A53 | Adreno 508 | LPDDR4 Dual-channel 1333 MHz | Download: Cat 12, up to 600 Mbit/s; Upload: Cat 13, up to 150 Mbit/s | Q2 2017 | List
|
Qualcomm Snapdragon 636 (SDM636)[33] | 1.8 GHz Quad-core Kryo 260 Gold (Cortex-A73) | — | 1.6 GHz Quad-core Kryo 260 Silver (Cortex-A53) | Adreno 509 | Q3 2017 | List
| |||
Qualcomm Snapdragon 660 (SDM660)[34] | 2.2 GHz Quad-core Kryo 260 Gold (Cortex-A73) | — | 1.84 GHz Quad-core Kryo 260 Silver (Cortex-A53) | Adreno 512 | LPDDR4 Dual-channel 1866 MHz | Q2 2017 | List
| ||
Qualcomm Snapdragon 632 (SDM632)[35] | 1.8 GHz Quad-core Kryo 250 Gold (Cortex-A73) | — | 1.8 GHz Quad-core Kryo 250 Silver (Cortex-A53) | Adreno 506 | LPDDR3 | Download: Cat 7, up to 300 Mbit/s; Upload: Cat 13, up to 150 Mbit/s | Q2 2018 | List
| |
Qualcomm Snapdragon 670 (SDM670)[36] | 10 nm | 2.0 GHz Dual-core Kryo 360 Gold (Cortex-A75) | — | 1.7 GHz Hexa-core Kryo 360 Silver (Cortex-A55) | Adreno 615 | LPDDR4X Dual-channel 1866 MHz | Download: Cat 12, up to 600 Mbit/s; Upload: Cat 13, up to 150 Mbit/s | Q3 2018 | List
|
Qualcomm Snapdragon 675 (SM6150)[37] | 11 nm | 2.0 GHz Dual-core Kryo 460 Gold (Cortex-A76) | — | 1.7 GHz Hexa-core Kryo 460 Silver (Cortex-A55) | Adreno 612 | Q1 2019 | List
| ||
Qualcomm Snapdragon 665 (SM6125)[38] | 2.0 GHz Quad-core Kryo 260 Gold (Cortex-A73) | — | 1.8 GHz Quad-core Kryo 260 Silver (Cortex-A53) | Adreno 610 | LPDDR3/LPDDR4X Dual‑channel up to 1866 MHz | Q2 2019 | List
| ||
Qualcomm Snapdragon 710 (SDM710)[39] | 10 nm | 2.2 GHz Dual-core Kryo 360 Gold (Cortex-A75) | — | 1.7 GHz Hexa-core Kryo 360 Silver (Cortex-A55) | Adreno 616 | LPDDR4X up to 8 GB, Dual-channel 16-bit (32-bit), 1866 MHz (14.9 GB/s) | Download: Cat 15, up to 800 Mbit/s; Upload: Cat 13, up to 150 Mbit/s | Q2 2018 | List
|
Qualcomm Snapdragon 712 (SDM712)[40] | 2.3 GHz Dual-core Kryo 360 Gold (Cortex-A75) | — | Q1 2019 | List
| |||||
Qualcomm Snapdragon 730 (SM7150-AA/AB)[41] | 8 nm | 2.2 GHz Dual-core Kryo 470 Gold (Cortex-A76) | — | 1.8 GHz Hexa-core Kryo 470 Silver (Cortex-A55) | Adreno 618 | LPDDR4X up to 8 GB, Dual-channel 16-bit (32-bit), 1866 MHz (14.9 GB/s) | Download: Cat 15, up to 800 Mbit/s; Upload: Cat 13, up to 150 Mbit/s | Q2 2019 | List
|
Qualcomm Snapdragon 765 (SM720-AA/AB)[42]
(DynamIQ) |
7 nm | 2.3 or 2.4 GHz Single-core Kryo 475 Prime | 2.2 GHz Single-core Kryo 475 Gold | 1.8 GHz Hexa-core Kryo 465 Silver | Adreno 620 | LPDDR4X, Dual-channel 16-bit (32-bit), 2133 MHz (17 GB/s) | Qualcomm X52 5G/LTE
5G: download up to 3,7 Gbit/s, upload: up to 1,6 Gbit/s; LTE: download Cat 24, up to 1200 Mbit/s, upload Cat 22, up to 210 Mbit/s |
Q4 2019 | Redmi K30 5G, Oppo Reno3 Pro, Realme X50 5G |
Qualcomm Snapdragon 808 (MSM8992)[43] | 20 nm | 1.8 GHz Dual-core Cortex-A57 | — | 1.5 GHz Quad-core ARM Cortex-A53 | Adreno 418 | 32-bit 933 MHz LPDDR3 (14.9 GB/s) | LTE Cat 6/7 | H1 2015 | List
|
Qualcomm Snapdragon 810 (MSM8994)[44] | 20 nm | 2.0 GHz Quad-core Cortex-A57 | — | 1.5 GHz Quad-core ARM Cortex-A53 | Adreno 430 | 32-bit dual-channel 1600 MHz LPDDR4 (25.6 GB/s) | LTE Cat 6/7 | H1 2015 | List
|
Qualcomm Snapdragon 820/821 (MSM8996/MSM8996 Pro)[45][46] | 14 nm LPP | 1.8–2.34 GHz Dual-core Kryo | — | 1.36–2.19 GHz Dual-core Kryo | Adreno 530 | LPDDR4-1866 Dual-Channel 64-Bit (29.8GB/s) | Downlink: LTE Cat 12,
Uplink: LTE Cat 13 |
Q4 2015 | List
|
Qualcomm Snapdragon 835 (MSM8998)[47] | 10 nm FinFET | 2.35–2.45 GHz Quad-core Kryo | — | 1.8–1.9 GHz Quad-core Kryo | Adreno 540 @710MHz | LPDDR4X-1866 Dual-Channel 64-Bit (29.8GB/s) | Qualcomm X16 LTE Downlink: LTE Cat 16,
Uplink: LTE Cat 13 |
Q4 2016 | List
|
Qualcomm Snapdragon 845 (SDM845)[48] | 10nm FinFET LPP | 2.8 GHz Quad-Core "Kryo 385 Gold" | — | 1.8 GHz Quad-Core "Kryo 385 Silver" | Adreno 630 @710MHz | LPDDR4X-1866 Quad-Channel 64-Bit (29.9GB/s) | Qualcomm X20 LTE Downlink: LTE Cat.18
Uplink: LTE Cat.13 |
Q1 2018 | List
|
Qualcomm Snapdragon 850 (SDM850) | 10nm FinFET LPP | 2.95 GHz Quad-Core "Kryo 385 Gold" | — | 1.8GHz Quad-Core "Kryo 385 Silver" | Adreno 630 @710MHz | LPDDR4X-1866 Quad-Channel 64-Bit (29.9GB/s) | Qualcomm X20 LTE Downlink: LTE Cat.18
Uplink: LTE Cat.13 |
Q3 2018 | |
Qualcomm Snapdragon 855 (SM8150)[49]
(DynamIQ) |
7nm FinFET N7 | 2.84 GHz Single-Core "Kryo 485 Gold Prime" | 2.42 GHz Tri-Core "Kryo 485 Gold" | 1.8 GHz Quad-Core "Kryo 485 Silver" | Adreno 640 @585MHz | LPDDR4X-2133 Quad-Channel 64-Bit (34.13GB/s) | Qualcomm X24 LTE Downlink: LTE Cat.20
Uplink: LTE Cat.13 |
Q1 2019 | List
|
Qualcomm Snapdragon 855+ (SM8150-AC)[50]
(DynamIQ) |
7nm FinFET N7 | 2.96 GHz Single-Core "Kryo 485 Gold Prime" | 2.42 GHz Tri-Core "Kryo 485 Gold" | 1.8 GHz Quad-Core "Kryo 485 Silver" | Adreno 640 @672MHz | LPDDR4X-2133 Quad-Channel 64-Bit (34.13GB/s) | Qualcomm X24 LTE Downlink: LTE Cat.20
Uplink: LTE Cat.13 |
Q3 2019 | List
|
Qualcomm Snapdragon 865 (SM8250)[51]
(DynamIQ) |
7nm+ FinFET EUV (N7P) | 2.84 GHz Single-Core "Kryo 585 Gold Prime" | 2.42 GHz Tri-Core "Kryo 585 Gold" | 1.8 GHz Quad-Core "Kryo 585 Silver" | Adreno 650 | LPDDR5-2750 Quad-Channel 64-Bit (44GB/s)
or LPDDR4X-2133 Quad-Channel 64-Bit (33.4GB/s) |
External: Qualcomm X55 5G NSA/SA
LTE Downlink: LTE Cat.22 LTE Uplink: LTE Cat.13 5G: Sub-6GHz, mmWave |
Q4 2019 | ZTE Axon 10s Pro 5G |
Qualcomm Snapdragon 8cx (8cx) | 7nm FinFET N7 | 2.84 GHz Quad-Core "Kryo 495" | — | 1.8 GHz Quad-Core "Kryo 495" | Adreno 680 | LPDDR4X-2133 Octa-Channel 128-Bit (68.26GB/s) | Qualcomm X24 LTE Downlink: LTE Cat.20
Uplink: LTE Cat.13 |
Q3 2019 | |
Microsoft SQ1 (SQ1) | 7nm FinFET N7 | 3 GHz Quad-Core "Kryo 495" | — | 1.8 GHz Quad-Core "Kryo 495" | Adreno 685 | LPDDR4X-2133 Octa-Channel 128-Bit (68.26GB/s) | Qualcomm X24 LTE Downlink: LTE Cat.20
Uplink: LTE Cat.13 |
Q3 2019 | Microsoft Surface Pro X |
Successor
In May 2017, ARM announced DynamIQ as the successor to big.LITTLE.[52] DynamIQ is expected to allow for more flexibility and scalability when designing multi-core processors. In contrast to big.LITTLE, it increases the maximum number of cores in a cluster to 8, allows for varying core designs within a single cluster, and up to 32 total clusters. The technology also offers more fine grained per core voltage control and faster L2 cache speeds. However, DynamIQ is incompatible with previous ARM designs and is initially only supported by the Cortex-A75 and Cortex-A55 CPU cores.
References
- ^ Nguyen, Hubert (17 January 2013). "What Is ARM big.LITTLE?". UberGizmo.com.
- ^ "big.LITTLE technology". ARM.com. Archived from the original on 22 October 2012. Retrieved 17 October 2012.
- ^ "ARM Unveils its Most Energy Efficient Application Processor Ever; Redefines Traditional Power And Performance Relationship With big.LITTLE Processing" (Press release). ARM Holdings. 19 October 2011. Retrieved 31 October 2012.
- ^ "ARM Launches Cortex-A50 Series, the World's Most Energy-Efficient 64-bit Processors" (Press release). ARM Holdings. Retrieved 31 October 2012.
- ^ "ARM's new Cortex-A12 is ready to power 2014's $200 midrange smartphones". The Verge. April 2014.
- ^ "ARM Cortex A17: An Evolved Cortex A12 for the Mainstream in 2015". AnandTech. April 2014.
- ^ Brian Jeff (18 June 2013). "Ten Things to Know About big.LITTLE". ARM Holdings. Retrieved 17 September 2013.
- ^ George Grey (10 July 2013). "big.LITTLE Software Update". Linaro. Archived from the original on 4 October 2013. Retrieved 17 September 2013.
- ^ Peter Clarke (6 August 2013). "Benchmarking ARM's big-little architecture". Retrieved 17 September 2013.
- ^ A Survey Of Techniques for Architecting and Managing Asymmetric Multicore Processors, ACM Computing Surveys, 2015.
- ^ Big.LITTLE Processing with ARM Cortex™-A15 & Cortex-A7 (PDF), ARM Holdings, September 2013, archived from the original (PDF) on 17 April 2012, retrieved 2013-09-17
- ^ Brian Klug (11 September 2013). "Samsung Announces big.LITTLE MP Support in Exynos 5420". AnandTech. Retrieved 16 September 2013.
- ^ a b c "Samsung Unveils New Products from its System LSI Business at Mobile World Congress". Samsung Tomorrow. Retrieved 26 February 2013.
- ^ "The future is here: iPhone X". Apple Newsroom. Retrieved 25 February 2018.
- ^ Andrew Cunningham (10 January 2013). "Samsung's new eight-core Exynos 5 Octa SoC promises not to hog battery". Ars Technica. Retrieved 10 January 2013.
- ^ James Trew (9 January 2013). "Samsung announces eight-core Exynos 5 'Octa' chip at CES". Engadget. Retrieved 10 January 2013.
- ^ "Samsung Primes Exynos 5 Octa for ARM big.LITTLE Technology with Heterogeneous Multi-Processing Capability" (Press release). Samsung Electronics. 10 September 2013. Retrieved 17 September 2013.
- ^ "Samsung Announces Exynos 5430: First 20nm Samsung SoC". AnandTech. Retrieved 14 August 2014.
- ^ "Samsung Introduces Galaxy Alpha, the evolution of Galaxy Design". Samsung Tomorrow. Retrieved 14 August 2014.
- ^ "Samsung's Exynos 5433 is an A57/A53 ARM SoC". AnandTech. Retrieved 17 September 2014.
- ^ "Samsung Announces the Galaxy S 6 and S 6 Edge". 1 March 2015. Retrieved 1 March 2015.
- ^ MP6530 (PDF), Renesas Mobile, December 2012, retrieved 17 September 2013
- ^ "Allwinner UltraOcta A80 processor packs a PowerVR Series6 GPU with 64 cores". Imagination. March 2014. Archived from the original on 3 September 2014. Retrieved 19 March 2014.
- ^ "A80". Allwinner. May 2014. Archived from the original on 2 May 2014. Retrieved 1 May 2014.
- ^ "MT6595 Octa-core LTE platform". MediaTek. April 2014. Archived from the original on 15 April 2014.
- ^ "Snapdragon 415 Processor". Qualcomm. 2 October 2018. Retrieved 31 December 2019.
- ^ "Snapdragon 615 Processor Specs and Details". Qualcomm. April 2014.
- ^ "Snapdragon 617 processor". Qualcomm. September 2015.
- ^ "Snapdragon 650 Processor Specs and Details". Qualcomm. November 2015.
- ^ "Snapdragon 652 Processor Specs and Details". Qualcomm. November 2015.
- ^ "Snapdragon 653 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 630 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 636 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 660 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 632 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 670 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 675 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 665 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 710 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 712 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 730 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 765 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 808 Processor Specs and Details". Qualcomm. April 2014.
- ^ "Snapdragon 810 Processor Specs and Details". Qualcomm. April 2014.
- ^ "Snapdragon 820 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 821 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 835 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 845 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 855 Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 855+ Processor Specs and Details". Qualcomm.
- ^ "Snapdragon 865 5G Processor Specs and Details". Qualcomm.
- ^ Humrick, Matt (29 May 2017). "Exploring Dynamiq and ARM's New CPUs". Anandtech. Retrieved 10 July 2017.
Further reading
- David Zinman (25 January 2013). "big.LITTLE MP status Jan 25, 2013". LWN.net. Retrieved 25 January 2013.
- Nicolas Pitre (15 February 2012). "Linux support for ARM big.LITTLE". LWN.net. Retrieved 18 October 2012.
- Paul McKenney (12 June 2012). "A big.LITTLE scheduler update". LWN.net. Retrieved 18 October 2012.
- Jake Edge (5 September 2012). "KS2012: ARM: A big.LITTLE update". LWN.net. Retrieved 18 October 2012.
- Jon Stokes (20 October 2011). "ARM's new Cortex A7 is tailor-made for Android superphones". Ars Technica. Retrieved 31 October 2012.
- Andrew Cunningham (30 October 2012). "ARM goes 64-bit with new Cortex-A53 and Cortex-A57 designs". Ars Technica. Retrieved 31 October 2012.
External links
- big.LITTLE Processing
- big.LITTLE Processing with ARM CortexTM-A15 & Cortex-A7 (PDF) (full technical explanation)