Addressing Modes Computer Organization and Architecture by Ravinder Nath Rajotiya - December 21, 2022December 21, 20220 Share on Facebook Share Send email Mail Print Print Table of Contents Toggle Addressing ModesAddressing ModePurpose of the addressing modes:Type of addressing modesImplied addressing Mode:Immediate addressing Mode :Register Addressing Mode :4. Register Indirect addressing Mode :5. Auto increment/Auto decrement addressing mode6. Direct Addressing Mode:7. Indirect addressing Mode:Relative Addressing Mode :Indexed Addressing ModeBase Register Addressing ModeExample:Exercise: Addressing Modes The instruction format for a general purpose computer was described in Instruction Types states that the OP-Code field specifies the operation to be performed, data is required to be supplied to ALU for this operation. Figure- Instruction format and ALU Addressing Mode The way the data or the operands are chosen during the execution of a program depends on how the data is to be supplied since data may come from input devices, from memory or from registers etc. So, the addressing mode specifies the rule or the methods for interpreting the address fields of the instruction before the operand is actually referred. Purpose of the addressing modes: To give programming versatilities to the user by providing different ways of addressing or referencing to data such as naming variables, pointers (*) and address (&) etc , in assembly they are referred are contents in registers, in memory at location given direct or indirect etc. To reduce the number of bits in the address field of the instruction. To give programmers flexibility in writing programs. Type of addressing modes Implied addressing Mode Immediate addressing Mode Register Addressing Mode Register Indirect addressing Mode Auto increment/Auto decrement addressing mode Direct Addressing Mode Indirect addressing Mode Relative Addressing Mode Indexed Addressing Mode Base Register Addressing Mode These are explain below: Implied addressing Mode: Operands are specified implicitly in the instruction. These type of instruction are zero address instructions. CLC, CLA are example. Programming example of zero address instruction is: PUSH A, PUSH B ADD : TOS <–(A+B) ; this instruction does not use address field Immediate addressing Mode : Operand is specified in the instruction itself, the operand is specified in the address part of the field. Register Addressing Mode : Address part of the instruction specifies a processor register rather than the address of operands. In these type of instructions the operand is specified in the registers. 4. Register Indirect addressing Mode : Here the content of the register specified in the instruction give the address of the operand residing in memory. ADD A, M[R] 5. Auto increment/Auto decrement addressing mode In this type of instructions, the register is incremented or decremented after or before its value is used to access the memory i.e. after or before execution of the instruction. 6. Direct Addressing Mode: The address of the operand in memory is given in the address part instruction. 7. Indirect addressing Mode: The address part instruction gives the information about another address where the operand is to be found in the memory. Some instructions require the addressing part of the instruction to be added to the content of a register to find the effective address of the operand. i.e. Effective address = address part of the instruction + content of specified register Relative Addressing Mode : Here the content of the PC is added to the address part of the instruction to get to the operand. i.e. Effective address = address part of the instruction + content of the PC+1 1 is added because when an instruction at address is fetched, its content increments by 1. Example is PC=500 and the address part of instruction which will be fetched contains 50 then the effective address of the operand will be: i.e. Effective address = 50 + content of the 501 = 551 Indexed Addressing Mode In this case content of an index register is added to the address part of instruction to get the effective address of the operand i.e. Effective address = address part of the instruction + content of the index register Base Register Addressing Mode This type of mode is similar to the above (indexed addressing mode) except that the register now is a base register. i.e. Effective address = address part of the instruction + content of the base register Example: An instruction Load AC, 500 is stored in memory at address 200 and 201, opcode at address 200 and address part at 201 address. Content of PC = 200 R1= 400, Index Register XR =100 AC receives the operand after execution of instruction Show the effective address of the operand and the content of the AC after the instruction is executed using different addressing mode. Solution: We can use the above data to draw the following figure Figure- Values for calculation of effective address and AC content Table below lists the effective address and the content of the accumulator when the instruction is executed using different addressing modes. Addressing Mode Effective Address Content of Accumulator (AC) Implied – – Immediate Addressing Mode 201 500 Direct Memory Addressing 500 800 Indirect Addressing 800 300 Relative Addressing PC(202) + addr (500) =702 Since PC incremented twice once for Load PC, then after reading address part of instruction which is at address 201 325 Indexed Addressing 600 900 Register Addressing – 400 Register Indirect 400 700 Auto Increment 400 700 Auto Decrement 399 450 ** Auto Increment Mode is same as Register Indirect mode except that R1 is incremented to 401 after the execution of the instruction ** Auto Increment Mode is same as Register Indirect mode except that R1 is decremented to 399 prior to the execution of the instruction . Exercise: An instruction is stored at location 300 with its address field at location 301. The address field has the value 400. A processor register R1 contains the number 200. Evaluate the effective address if the addressing mode of instruction is: i. Direct ii. Immediate iii. Relative iv. Register Indirect v. Indexed with R1 as the index register 2. A two-word instruction is stored in memory at address designated by symbol W. The address field of the instruction (stored at W+1) is designated by symbol Y. The operand used during the execution of the instruction is stored at an address symbolized by Z. An index register contains the value X. State how Z is calculated from the other addresses if the addressing mode of the instruction is: direct indirect relative indexed Share on Facebook Share Send email Mail Print Print