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ISPASS 2022: Singapore
- International IEEE Symposium on Performance Analysis of Systems and Software, ISPASS 2022, Singapore, May 22-24, 2022. IEEE 2022, ISBN 978-1-6654-5954-9
- Konstantin Levit-Gurevich, Alex Skaletsky, Michael Berezalsky, Yulia Kuznetcova, Hila Yakov:
Profiling Intel Graphics Architecture with Long Instruction Traces. 1-11 - Sanyam Mehta:
Performance Analysis and Optimization with Little's Law. 12-23 - Yiqian Liu, Noushin Azami, Corbin Walters, Martin Burtscher:
The Indigo Program-Verification Microbenchmark Suite of Irregular Parallel Code Patterns. 24-34 - Dimitris Sartzetakis, George Papadimitriou, Dimitris Gizopoulos:
gpuFI-4: A Microarchitecture-Level Framework for Assessing the Cross-Layer Resilience of Nvidia GPUs. 35-45 - Zixian Cai, Stephen M. Blackburn, Michael D. Bond, Martin Maas:
Distilling the Real Cost of Production Garbage Collectors. 46-57 - Wenjie Liu, Wim Heirman, Stijn Eyerman, Shoaib Akram, Lieven Eeckhout:
Scale-Model Architectural Simulation. 58-68 - Jorge Ortiz, David Corbalán-Navarro, Juan L. Aragón, Antonio González:
MEGsim: A Novel Methodology for Efficient Simulation of Graphics Workloads in GPUs. 69-78 - Marcos Horro, Louis-Noël Pouchet, Gabriel Rodríguez, Juan Touriño:
MARTA: Multi-configuration Assembly pRofiler and Toolkit for performance Analysis. 79-89 - Tessil Thomas, Bharath Venkatasubramanian, Dinesh Sthapit, Christopher Gray, Atresh Gummadavelly, Janick Bergeron, Pankaj Mehta, Prabu Thangamuthu:
Left-shifter: A pre-silicon framework for usage model based performance verification of the PCIe interface in server processor system on chips. 90-98 - Zafar Ahmad, Mohammad Mahdi Javanmard, Gregory Thomas Croisdale, Aaron Gregory, Pramod Ganapathi, Louis-Noël Pouchet, Rezaul Chowdhury:
FOURST: A code generator for FFT-based fast stencil computations. 99-108 - Alex Skaletsky, Konstantin Levit-Gurevich, Michael Berezalsky, Yulia Kuznetcova, Hila Yakov:
Flexible Binary Instrumentation Framework to Profile Code Running on Intel GPUs. 109-120 - Shalini Jain, Yashas Andaluri, S. VenkataKeerthy, Ramakrishna Upadrasta:
POSET-RL: Phase ordering for Optimizing Size and Execution Time using Reinforcement Learning. 121-131 - Jorge Sierra Acosta, Andreas Diavastos, Antonio González:
XFeatur: Hardware Feature Extraction for DNN Auto-tuning. 132-134 - Sandeep Kumar, Abhisek Panda, Smruti R. Sarangi:
SGXGauge: A Comprehensive Benchmark Suite for Intel SGX. 135-137 - Mohsen Koohi Esfahani, Peter Kilpatrick, Hans Vandierendonck:
SAPCo Sort: optimizing Degree-Ordering for Power-Law Graphs. 138-140 - Yuhang Li, Mei Wen, Jiawei Fei, Junzhong Shen, Yasong Cao:
TILE-SIM: A Systematic Approach to Systolic Array-based Accelerator Evaluation. 141-143 - John Osorio Ríos, Adrià Armejach, Eric Petit, Greg Henry, Marc Casas:
FASE: A Fast, Accurate and Seamless Emulator for Custom Numerical Formats. 144-146 - Jerrit Eickhoff, Jesse Donkervliet, Alexandru Iosup:
Meterstick: Benchmarking Performance Variability in Cloud and Self-hosted Minecraft-like Games. 147-149 - Mayank Keoliya, Puru Sharma, Djordje Jevdjic:
Simulating Noisy Channels in DNA Storage. 150-152 - Bin Gao, Hao-Wei Tee, Alireza Sanaee, Soh Boon Jun, Djordje Jevdjic:
OS-level Implications of Using DRAM Caches in Memory Disaggregation. 153-155 - Shigeyuki Sato, Kota Iizuka, Naoki Yoshifuji, Masaki Natsume:
VIPP: Validation-Included Precision-Parametric N-Body Benchmark Suite. 156-158 - Nupur Sumeet, Karan Rawat, Manoj Nambiar:
High-Performance Deployment of Text Detection Model: Compression and Hardware Platform considerations. 159-161 - Srivatsan Krishnan, Zishen Wan, Kshitij Bhardwaj, Ninad Jadhav, Aleksandra Faust, Vijay Janapa Reddi:
Roofline Model for UAVs: A Bottleneck Analysis Tool for Onboard Compute Characterization of Autonomous Unmanned Aerial Vehicles. 162-174 - Mohammad Bakhshalipour, Maxim Likhachev, Phillip B. Gibbons:
RTRBench: A Benchmark Suite for Real-Time Robotics. 175-186 - Yongqin Wang, G. Edward Suh, Wenjie Xiong, Benjamin Lefaudeux, Brian Knott, Murali Annavaram, Hsien-Hsin S. Lee:
Characterization of MPC-based Private Inference for Transformer-based Models. 187-197 - Atefeh Mehrabi, Daniel J. Sorin, Benjamin C. Lee:
Spatiotemporal Strategies for Long-Term FPGA Resource Management. 198-209 - Shubham Nema, Justin Kirschner, Debpratim Adak, Sapan Agarwal, Ben Feinberg, Arun F. Rodrigues, Matthew J. Marinella, Amro Awad:
Eris: Fault Injection and Tracking Framework for Reliability Analysis of Open-Source Hardware. 210-220 - Geonhwa Jeong, Bikash Sharma, Nick Terrell, Abhishek Dhanotia, Zhiwei Zhao, Niket Agarwal, Arun Kejariwal, Tushar Krishna:
Understanding Data Compression in Warehouse-Scale Datacenter Services. 221-223 - Uday Kumar Reddy Vengalam, Anshujit Sharma, Michael C. Huang:
LoopIn: A Loop-Based Simulation Sampling Mechanism. 224-226 - Zhongyi Lin, Louis Feng, Ehsan K. Ardestani, Jaewon Lee, John Lundell, Changkyu Kim, Arun Kejariwal, John D. Owens:
Building a Performance Model for Deep Learning Recommendation Model Training on GPUs. 227-229 - Sairo R. dos Santos, Tiago Rodrigo Kepe, Francis B. Moreira, Paulo C. Santos, Marco A. Z. Alves:
Advancing Near-Data Processing with Precise Exceptions and Efficient Data Fetching. 230-232 - Nedasadat Taheri, Alexander Manely, Ahmni R. Pang, Mohammad Alian:
Profiling an Architectural Simulator. 233-235 - Kshitij Bhardwaj, James Diffenderfer, Bhavya Kailkhura, Maya B. Gokhale:
Benchmarking Test-Time Unsupervised Deep Neural Network Adaptation on Edge Devices. 236-238 - Marcus Chow, Ali Jahanshahi, Ana Cardenas Beltran, Sheldon X.-D. Tan, Daniel Wong:
GPUCalorie: Floorplan Estimation for GPU Thermal Evaluation. 239-241 - Sofiane Chetoui, Rahul Shahi, Seif Abdelaziz, Abhinav Golas, Farrukh Hijaz, Sherief Reda:
ARBench: Augmented Reality Benchmark For Mobile Devices. 242-244 - Li Tang, Scott Pakin:
Cross-Level Characterization of Program Behavior : (Extended Poster Abstract). 245-247 - Ahmad Alawneh, Mahmoud Khairy, Timothy G. Rogers:
A SIMT Analyzer for Multi-Threaded CPU Applications. 248-250 - Steffen Jensen, Jaekyu Lee, Dam Sunwoo, Matthew J. Horsnell, Lizy K. John:
Microarchitectural Performance Evaluation of AV1 Video Encoding Workloads. 251-253 - Mark Horeni, Pooria Taheri, Po-An Tsai, Angshuman Parashar, Joel S. Emer, Siddharth Joshi:
Ruby: Improving Hardware Efficiency for Tensor Algebra Accelerators Through Imperfect Factorization. 254-266 - Hadjer Benmeziane, Smaïl Niar, Hamza Ouarnoughi, Kaoutar El Maghraoui:
Pareto Rank Surrogate Model for Hardware-aware Neural Architecture Search. 267-276 - Qijing Huang, Charles Hong, John Wawrzynek, Mahesh Subedar, Yakun Sophia Shao:
Learning A Continuous and Reconstructible Latent Space for Hardware Accelerator Design. 277-287 - Axel Stjerngren, Perry Gibson, José Cano:
Bifrost: End-to-End Evaluation and optimization of Reconfigurable DNN Accelerators. 288-299 - Hyokeun Lee, Hyungsuk Kim, Seokbo Shim, Seungyong Lee, Do-sun Hong, Hyuk-Jae Lee, Hyun Kim:
PCMCsim: An Accurate Phase-Change Memory Controller Simulator and its Performance Analysis. 300-310 - Vasudha, Biswabandan Panda:
Address Translation Conscious Caching and Prefetching for High Performance Cache Hierarchy. 311-321 - Stijn Eyerman, Wim Heirman, Ibrahim Hur:
DRAM Bandwidth and Latency Stacks: Visualizing DRAM Bottlenecks. 322-331
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