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ORCID5th LASCAS 2014: Santiago, Chile
- IEEE 5th Latin American Symposium on Circuits and Systems, LASCAS 2014, Santiago, Chile, February 25-28, 2014. IEEE 2014
- Andres Amaya, Guillermo Espinosa, Rodolfo Villamizar
:
A robust to PVT variations low-voltage low-power current mirror. 1-4 - Benjamín T. Reyes, German Paulina, Lucas Tealdi, Emanuel Labat, Raul M. Sanchez, Pablo Sergio Mandolesi, Mario Rafael Hueda:
A 1.6Gb/s CMOS LVDS transmitter with a programmable pre-emphasis system. 1-4 - Diomadson Belfort, Sebastian Yuri Cavalcanti Catunda, Hassan Aboushady:
Design of RF BAW-based ΣΔ Modulators. 1-4 - Diego Avila, Enrique Alvarez, Angel Abusleme:
Digital assistance for energy reduction in ADCs using a simple signal prediction algorithm. 1-3 - Joaquin Aldunate, Carlos Feres, Spyros Vlahoyiannatos, Christian Oberli, Jean-Paul de Villers-Grandchamps, Marcelo Guarini:
A DAC reconstruction filter for narrowband long distance Communications. 1-4 - Cristina Meinhardt, Ricardo Reis:
Comparing high-performance cells in CMOS bulk and FinFET technologies. 1-4 - David Ernesto Troncoso Romero, Miriam Guadalupe Cruz Jiménez, Gordana Jovanovic-Dolecek:
Design of Chebyshev Comb Filter (CCF)-based decimators with compensated passband. 1-4 - Gabriel Balota, Mário Saldanha, Gustavo Sanchez, Bruno Zatt, Marcelo Schiavon Porto, Luciano Volcan Agostini:
Overview and quality analysis in 3D-HEVC emergent video coding standard. 1-4 - Ivan R. Padilla-Cantoya, Francisco Silva-Del-Rosario, Miguel Silva-Martinez, Jesus E. Molinar-Solis:
Comparison of conventional and new class AB modifications of the Flipped Voltage Follower and their implementation in high performance amplifiers. 1-4 - Oscar E. Mattia, Hamilton Klimach, Sergio Bampi:
0.9 V, 5 nW, 9 ppm/oC resistorless sub-bandgap voltage reference in 0.18μm CMOS. 1-4 - Benjamín T. Reyes, Lucas Tealdi, German Paulina, Emanuel Labat, Raul M. Sanchez, Pablo Sergio Mandolesi, Mario Rafael Hueda:
A 6-bit 2GS/s CMOS time-interleaved ADC for analysis of mixed-signal calibration techniques. 1-4 - Gerardo Molina Salgado, Gordana Jovanovic-Dolecek, José M. de la Rosa:
Modified comb decimator for high power-of-two decimation factors. 1-4 - Pablo Perez-Nicoli, Pablo Castro-Lisboa, Fernando Silveira:
A series-parallel switched capacitor step-up DC-DC converter and its gate-control circuits for over the supply rail switches. 1-4 - Yong Hooi Lim, Likun Xia:
A low power biopotential amplifier in 0.35um CMOS for portable EEG signal amplification. 1-4 - S. Arash Sheikholeslam, Cristian Grecu, André Ivanov:
A novel tri-state device implemented with a metal gated QCA. 1-3 - R. R. Neli, I. Doi, J. A. Diniz:
Characterization of fast-response and low-noise poly si uncooled far infrared sensor. 1-4 - M. T. Kousoulis, G. E. Antoniou:
4D FIR digital filter realizations. 1-4 - Tiago S. Curtinhas, Duarte Lopes de Oliveira, Diego Bompean, Lester de Abreu Faria, Leonardo Romano:
SICARELO: A tool for synthesis of locally-clocked extended burst-mode asynchronous Controllers. 1-4 - Salim Lahmiri, Mounir Boukadoum:
Adjusted empirical mode decomposition with improved performance for signal modeling and prediction. 1-4 - Ziyang Qi, Kun Ma, Qiang Zhou, Yici Cai:
RSMT construction algorithm based on Congestion-Oriented Flexibility. 1-4 - Ismael Seidel, André Beims Bräscher, Marcio Monteiro, Jose Luis Giintzel:
Exploring pel decimation to trade off between energy and quality in video coding. 1-4 - Bruno B. Cardoso, José Gabriel Rodríguez Carneiro Gomes:
CMOS imager with focal-plane image compression based on the EZW algorithm. 1-4 - Ángel Rodríguez-Vázquez, Ricardo Carmona-Galán, Jorge Fernández-Berni, Sonia Vargas-Sierra, Juan A. Leñero-Bardallo, Manuel Suarez, Víctor M. Brea, Maria Belen Pérez-Verdú:
Form factor improvement of smart-pixels for vision sensors through 3-D vertically-integrated technologies. 1-4 - Jimmy Tarrillo, Fernando A. Escobar, Fernanda Lima Kastensmidt, Carlos Valderrama:
Dynamic partial reconfiguration manager. 1-4 - M. L. Matias, J. P. C. Cunha, Paulo Augusto Dal Fabbro, Daniel Pasti Mioni, William Prodanov, Murilo Pilon Pessatti, Bernardo Leite, A. A. Mariano:
A comparison of high-efficiency UHF RFID rectifiers using internal voltage compensation and zero-threshold-voltage MOSFETs. 1-4 - Catalina Munoz Morales, G. Sebastian Eslava:
Linear and non-linear channel prediction performance for a MIMO-OFDM system. 1-4 - Mohammed A. Hasan:
Derivation of fractional order differentiators. 1-4 - Márcio Bender Machado, Márcio Cherem Schneider, Carlos Galup-Montoro:
Design of a fully integrated colpitts oscillator operating at VDD below 4kT/q. 1-4 - Somayyeh Rahimian Omam, Yusuf Leblebici, Giovanni De Micheli:
Parallel vs. serial inter-plane communication using TSVs. 1-5 - Esteban J. Pino, Moises Campos, Pablo Aqueveque:
Low-cost obstacle detection device for sight impaired people. 1-3 - Alexandre Solon Nery, Nadia Nedjah, Felipe Maia Galvão França, Lech Józwiak, Henk Corporaal:
Automatic complex instruction identification for efficient application mapping onto ASIPs. 1-4 - C. C. A. Mendes, Gabriel C. L. Cunha, Michel Vasilevski, Vincent P. M. Bourguet, Sebastian Yuri Cavalcanti Catunda, Robson Nunes de Lima, M. Barros:
Specifications for a multi-standard SBCD/ARGOS-3 integrated UHF satellite receiver. 1-4 - Juan M. Marmolejo-Tejada, Vladimir Trujillo-Olaya, Claudia Patricia Renteria-Mejia, Jaime Velasco-Medina:
Hardware implementation of the Smith-Waterman algorithm using a systolic architecture. 1-4 - David A. Calvillo-Cortes, Leo C. N. de Vreede:
Analysis of pure- and mixed-mode class-B outphasing amplifiers. 1-4 - Antônio Carlos M. de Queiroz:
Electrostatic energy harvesting without active control circuits. 1-4 - Marco Lanuzza, Ramiro Taco:
Improving speed and power characteristics of pulse-triggered flip-flops. 1-4 - Paulo Realpe-Muñoz, Vladimir Trujillo-Olaya, Jaime Velasco-Medina:
Design of elliptic curve cryptoprocessors over GF(2163) on Koblitz curves. 1-4 - Mohammed A. Hasan:
Methods for fractional delay approximation. 1-4 - Andre Faul, John Naber:
Design and test of a 915MHz, RFID-based pressure sensor for Glaucoma. 1-4 - Pedro Maat C. Massolino, Cíntia Borges Margi, Paulo S. L. M. Barreto, Wilson Vicente Ruggiero:
Scalable hardware implementation for Quasi-Dyadic Goppa encoder. 1-4 - J. G. Garcia-Sanchez, Daniel Calderón-Preciado, F. Sandoval-Ibarra, José M. de la Rosa:
Behavioral modelling of a 4th order LP ΣΔ modulator-towards the design of a hybrid proposal. 1-4 - Adriel Ziesemer, Ricardo Reis, Matheus T. Moreira, Michel Evandro Arendt, Ney Laert Vilar Calazans:
Automatic layout synthesis with ASTRAN applied to asynchronous cells. 1-4 - Katarzyna Grzesiak-Kopec, Maciej Ogorzalek:
New approach to block-level 3D IC layout design. 1-4 - Hiroaki Igarashi, Youhua Shi, Masao Yanagisawa, Nozomu Togawa:
Throughput driven check point selection in suspicious timing error prediction based designs. 1-4 - Marco Aurelio Nuño-Maganda, Yahir Hernandez-Mier, César Torres-Huitzil, Josue Jimenez-Arteaga:
FPGA-based real-time citrus classification system. 1-4 - Gerard F. Santillan-Quinonez, Carlos Galup-Montoro:
High-sensitivity split-contact magnetoresistors on lightly doped silicon substrates. 1-4 - Hiroyuki Yamauchi, Worawit Somha:
A technique to solve issue of Richardson-Lucy deconvolution for analyzing RTN effects on SRAM margin variation. 1-4 - Felipe Navarro, Sandra Cancino, Enrique Estupinan:
Depth estimation for visually impaired people using mobile devices. 1-4 - Emmanuel Torres-Rios, Carlos E. Saavedra:
A new compact nonlinear model improvement methodology for GaN-HEMT. 1-4 - Aref Bakhtazad, Rayyan Manwar, Sazzadur Chowdhury:
Cavity formation in bonded silicon wafers using partially cured dry etch bisbenzocyclobutene (BCB). 1-4 - Yilda Irizarry-Valle, Alice C. Parker, Norberto M. Grzywacz:
An adaptable CMOS depressing synapse with detection of changes in input spike rate. 1-4 - Darwin M. Paredes-Calderon, José Antonio Apolinário:
Detailing a useful position calibration for microphone arrays. 1-4 - Jorge Mario Garzón Rey, Juan Manuel Soto Valencia, Antonio Garcia Rozo, Fredy Segura-Quijano:
Lab-on-Phone: A Participatory Sensing system. 1-5 - Osmar Franca Siebel, J. G. Pereira, Márcio C. Schneider, Carlos Galup-Montoro:
A MOSFET dosimeter built on an off-the-shelf component for in vivo radiotherapy applications. 1-4 - Johnny Rengifo, José Manuel Aller, Alberto Berzoy, José A. Restrepo:
Predictive DTC algorithm for induction machines using Sliding Horizon Prediction. 1-4 - Kirsten Weide-Zaage, Aymen Moujbani, Jörg Kludt:
Simulation in 3D integration and TSV. 1-5 - Mohammad A. Ahmed, Malgorzata Chrzanowska-Jeske:
TSVs in early layout design exploration for 3D ICs. 1-4 - Heloisa Dina Bezerra, Nadia Nedjah, Luiza de Macedo Mourelle:
Reconfigurable hardware architecture for music generation using cellular automata. 1-4 - Lívia Amaral, Dieison Silveira, Guilherme Povala, Marcelo Schiavon Porto, Luciano Volcan Agostini, Bruno Zatt:
Memory energy consumption reduction in video coding systems. 1-4 - Manuel Carrasco-Robles, Manuel Delgado-Restituto:
Mixed-signal energy feature extractor of EEG frequency bands. 1-4 - Roberto Gómez-García, Raul Loeches-Sanchez, José Maria Muñoz-Ferreras, José Pedro Borrego, José Pedro Magalhães, Nuno Borges Carvalho, José M. N. Vieira, Félix Pérez-Martínez:
Dual-band lowpass/bandpass periodic-type microstrip filter with Long-Term-Evolution (LTE) service mitigation. 1-4 - Arturo Sarmiento-Reyes, Luis Hernández-Martínez, Carlos Hernández-Mejía, Gerardo Ulises Diaz-Arango, Hector Vazquez-Leal:
A fully symbolic homotopy-based memristor model for applications to circuit simulation. 1-4 - Bruno Policarpo Toledo Freitas, Altamiro Amadeu Susin, Alexsandro Cristovão Bonatto:
Ginga MiddleWare on a SoC for Digital Television Set-Top Box. 1-4 - Shervin Erfani, Majid Ahmadi, Nima Bayan:
Two-dimensional analog filtering and its implications on circuit theory. 1-5 - Henrique Maich, Vladimir Afonso, Bruno Zatt, Luciano Volcan Agostini, Marcelo Schiavon Porto:
HEVC Fractional Motion Estimation complexity reduction for real-time applications. 1-4 - Bahareh Gholamzadeh, Ebrahim Ghafar-Zadeh, Falah R. Awwad, Mohamad Sawan:
Piezoresistive cantilever platform for label-free detection of molecules. 1-4 - Ruchir Saraswat, Esther Rodríguez-Villegas:
Chaotic inductively coupled non-PLL low emission transmitter for implanted devices. 1-4 - Firat Kaçar, Arkan Ismail, Hakan Kuntman:
New CMOS realization of Current Differencing Current Conveyor (CDCC) with biquad filter application. 1-4 - Marco Terres, Cristina Meinhardt, Guilherme Bontorin, Ricardo Reis:
Exploring more efficient architectures for Multiple Dynamic Supply Voltage designs. 1-4 - Claudia Patricia Renteria-Mejia, Alexander López-Parrado, Jaime Velasco-Medina:
Hardware design of FFT polynomial multipliers. 1-4 - Bartolomeo Montrucchio, Maurizio Rebaudengo, Alejandro David Velasco:
Software-implemented fault injection in operating system kernel mutex data structure. 1-6 - Marco Lanuzza, Ramiro Taco, Domenico Albano:
Dynamic gate-level body biasing for subthreshold digital design. 1-4 - Manoj Alwani, Sumit Johar, Surinder Pal Singh:
Transform domain based image / video privacy protection. 1-4 - Fernando da Rocha Paixão Cortes, Juan Pablo Martinez Brito, Everton Ghignatti, Alfredo Olmos, Fernando Chávez, Marcelo Lubaszewski:
A power management system architecture for LF passive RFID tags. 1-4 - A. F. Torres-Monsalve, J. D. Bolanos-Jojoa, Jaime Velasco-Medina:
Embedded system for area measurement using FPGA. 1-4 - Guilherme Povala, Dieison Silveira, Lívia Amaral, Bruno Zatt, Marcelo Schiavon Porto, Luciano Volcan Agostini:
An efficient reference frame compression approach for video coding systems. 1-4 - Chunyan Wang, Pascal Leduc:
Design of adaptive voltage amplifiers with an input-DC-level-dependent gain. 1-4 - Pedro Cisneros, Paul Rodríguez:
Practical hand tracking solution by alternating the use of a priori information. 1-4 - Julio Viola, Erick Baethge, Alberto Berzoy, José A. Restrepo, Flavio Quizhpi:
DC voltage estimation methods for multilevel converter operating with reduced number of sensors. 1-4 - Ruhan A. Conceição, Fabiane Rediess, Bruno Zatt, Marcelo Schiavon Porto, Luciano Volcan Agostini:
Configurable hardware design for the HEVC-based Adaptive Loop Filter. 1-4 - Douglas David Baptista de Souza, Sidnei Noceti Filho:
On generating a finite pulse or a symmetric impulse response by a generalized approximation function. 1-4 - Duarte Lopes de Oliveira, Kledermon Garcia, Roberto d'Amore:
Using FPGAs to implement asynchronous pipelines. 1-4
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