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Integration, Volume 25
Volume 25, Number 1, September 1998
- Stephen Strickland, Erhan Ergin, David R. Kaeli, Paul M. Zavracky:
VLSI design in the 3rd dimension. 1-16 - Christian Dufaza:
Theoretical properties of LFSRs for built-in self test. 17-35 - Chi-Ying Tsui, Massoud Pedram:
Accurate and efficient power simulation strategy by compacting the input vector set. 37-52 - Guillaume Luce, Jean Frédéric Myoupo:
Systolic-based parallel architecture for the longest common subsequences problem. 53-70 - Rajat Kumar Pal, Sudebkumar Prasant Pal, Ajit Pal:
An algorithm for finding a non-trivial lower bound for channel routing1. 71-84
Volume 25, Number 2, November 1998
- Klaus Jansen, Joachim Reiter:
An approximation algorithm for the register allocation problem. 89-102 - Sylvia M. Jennings, Joep L. W. Kessels:
Comparison of the VLSI cost/performance properties of two Reed-Solomon decoding algorithms1. 103-110 - R. X. T. Nijssen, C. A. J. van Eijk:
GreyHound: A methodology for utilizing datapath regularity in standard design flows. 111-135 - Jiaofeng Pan, Yu-Liang Wu, C. K. Wong, Guiying Yan:
On the optimal four-way switch box routing structures of FPGA greedy routing architectures1. 137-159 - Inki Hong, Darko Kirovski, Kevin T. Kornegay, Miodrag Potkonjak:
High-level synthesis techniques for functional test pattern execution1. 161-180
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