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2020 – today
- 2024
[j13]Manon Dampfhoffer
, Thomas Mesquida, Alexandre Valentian, Lorena Anghel:
Backpropagation-Based Learning Techniques for Deep Spiking Neural Networks: A Survey. IEEE Trans. Neural Networks Learn. Syst. 35(9): 11906-11921 (2024)- 2023
- [j12]Ivan Miro-Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Guillaume Waltener, Emmanuel Pluchart, Jean-Philippe Noel, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Yvain Thonnart, Alexandre Valentian, Frédéric Heitzmann, Fabien Clermidy:
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. IEEE J. Solid State Circuits 58(6): 1782-1797 (2023) - [j11]Manon Dampfhoffer, Thomas Mesquida, Alexandre Valentian, Lorena Anghel:
Are SNNs Really More Energy-Efficient Than ANNs? an In-Depth Hardware-Aware Study. IEEE Trans. Emerg. Top. Comput. Intell. 7(3): 731-741 (2023) - [c30]Manon Dampfhoffer, Thomas Mesquida, Emmanuel Hardy, Alexandre Valentian, Lorena Anghel:
Leveraging Sparsity with Spiking Recurrent Neural Networks for Energy-Efficient Keyword Spotting. ICASSP 2023: 1-5 - [c29]Manon Dampfhoffer, Joel Minguet Lopez, Thomas Mesquida, Alexandre Valentian, Lorena Anghel:
Improving the Robustness of Neural Networks to Noisy Multi-Level Non-Volatile Memory-based Synapses. IJCNN 2023: 1-8 - [i3]Ivan Miro-Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Guillaume Waltener, Emmanuel Pluchart, Jean-Philippe Noel, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Yvain Thonnart, Alexandre Valentian, Frédéric Heitzmann, Fabien Clermidy:
SamurAI: A Versatile IoT Node With Event-Driven Wake-Up and Embedded ML Acceleration. CoRR abs/2304.13726 (2023) - 2022
- [j10]Dennis V. Christensen, Regina Dittmann, Bernabé Linares-Barranco, Abu Sebastian, Manuel Le Gallo, Andrea Redaelli, Stefan Slesazeck, Thomas Mikolajick, Sabina Spiga, Stephan Menzel, Ilia Valov, Gianluca Milano, Carlo Ricciardi, Shi-Jun Liang, Feng Miao, Mario Lanza, Tyler J. Quill, Scott T. Keene, Alberto Salleo, Julie Grollier, Danijela Markovic, Alice Mizrahi, Peng Yao, J. Joshua Yang, Giacomo Indiveri, John Paul Strachan, Suman Datta, Elisa Vianello, Alexandre Valentian, Johannes Feldmann, Xuan Li, Wolfram H. P. Pernice, Harish Bhaskaran, Steve B. Furber, Emre Neftci, Franz Scherr, Wolfgang Maass, Srikanth Ramaswamy, Jonathan Tapson, Priyadarshini Panda, Youngeun Kim, Gouhei Tanaka, Simon Thorpe, Chiara Bartolozzi, Thomas A. Cleland, Christoph Posch, Shih-Chii Liu, Gabriella Panuccio, Mufti Mahmud, Arnab Neelim Mazumder, Morteza Hosseini, Tinoosh Mohsenin, Elisa Donati, Silvia Tolu, Roberto Galeazzi, Martin Ejsing Christensen, Sune Holm, Daniele Ielmini, N. Pryds:
2022 roadmap on neuromorphic computing and engineering. Neuromorph. Comput. Eng. 2(2): 22501 (2022) - [c28]Manon Dampfhoffer, Thomas Mesquida, Alexandre Valentian, Lorena Anghel:
Investigating Current-Based and Gating Approaches for Accurate and Energy-Efficient Spiking Recurrent Neural Networks. ICANN (3) 2022: 359-370 - 2021
- [c27]Maxence Bouvier, Alexandre Valentian, Gilles Sicard:
Scalable Pitch-Constrained Neural Processing Unit for 3D Integration with Event-Based Imagers. DAC 2021: 385-390 - [c26]Jean-René Léquepeys, Marc Duranton, Susana Bonnetier, Sandrine Catrou, Richard Fournel, Thomas Ernst, Laurent Hérault, D. Louis, A. Jerraya, Alexandre Valentian, François Perruchot, Thomas Signamarcheix, Elisa Vianello, Carlo Reita:
Overcoming the Data Deluge Challenges with Greener Electronics. ESSCIRC 2021: 7-14 - [c25]Jean-René Léquepeys, Marc Duranton, Susana Bonnetier, Sandrine Catrou, Richard Fournel, Thomas Ernst, Laurent Hérault, D. Louis, A. Jerraya, Alexandre Valentian, François Perruchot, Thomas Signamarcheix, Elisa Vianello, Carlo Reita:
Overcoming the Data Deluge Challenges with Greener Electronics. ESSDERC 2021: 7-14 - [i2]Dennis V. Christensen, Regina Dittmann, Bernabé Linares-Barranco, Abu Sebastian, Manuel Le Gallo, Andrea Redaelli, Stefan Slesazeck, Thomas Mikolajick, Sabina Spiga, Stephan Menzel, Ilia Valov, Gianluca Milano, Carlo Ricciardi, Shi-Jun Liang, Feng Miao, Mario Lanza, Tyler J. Quill, Scott T. Keene, Alberto Salleo, Julie Grollier, Danijela Markovic, Alice Mizrahi, Peng Yao, J. Joshua Yang, Giacomo Indiveri, John Paul Strachan, Suman Datta, Elisa Vianello, Alexandre Valentian, Johannes Feldmann, Xuan Li, Wolfram H. P. Pernice, Harish Bhaskaran, Emre Neftci, Srikanth Ramaswamy, Jonathan Tapson, Franz Scherr, Wolfgang Maass, Priyadarshini Panda, Youngeun Kim, Gouhei Tanaka, Simon Thorpe, Chiara Bartolozzi, Thomas A. Cleland, Christoph Posch, Shih-Chii Liu, Arnab Neelim Mazumder, Morteza Hosseini, Tinoosh Mohsenin, Elisa Donati, Silvia Tolu, Roberto Galeazzi, Martin Ejsing Christensen, Sune Holm, Daniele Ielmini, N. Pryds:
2021 Roadmap on Neuromorphic Computing and Engineering. CoRR abs/2105.05956 (2021) - 2020
- [c24]Amir Regev, Alessandro Bricalli, Giuseppe Piccolboni, Alexandre Valentian, Thomas Mesquida, Gabriel Molas, Jean-François Nodin:
Fully-Integrated Spiking Neural Network Using SiOx-Based RRAM as Synaptic Device. AICAS 2020: 145-148 - [c23]Ivan Miro Panades, Benoît Tain, Jean-Frédéric Christmann, David Coriat, Romain Lemaire, Clement Jany, Baudouin Martineau, Fabrice Chaix, Anthony Quelen, Emmanuel Pluchart, Jean-Philippe Noel, Reda Boumchedda, Adam Makosiej, Maxime Montoya, Simone Bacles-Min, David Briand, Jean-Marc Philippe, Alexandre Valentian, Frédéric Heitzmann, Edith Beigné, Fabien Clermidy:
SamurAI: A 1.7MOPS-36GOPS Adaptive Versatile IoT Node with 15, 000× Peak-to-Idle Power Reduction, 207ns Wake-Up Time and 1.3TOPS/W ML Efficiency. VLSI Circuits 2020: 1-2 - [i1]Maxence Bouvier, Alexandre Valentian, Thomas Mesquida, François Rummens, Marina Reyboz, Elisa Vianello, Edith Beigné:
Spiking Neural Networks Hardware Implementations and Challenges: a Survey. CoRR abs/2005.01467 (2020)
2010 – 2019
- 2019
- [j9]Maxence Bouvier, Alexandre Valentian, Thomas Mesquida, François Rummens, Marina Reyboz, Elisa Vianello, Edith Beigné:
Spiking Neural Networks Hardware Implementations and Challenges: A Survey. ACM J. Emerg. Technol. Comput. Syst. 15(2): 22:1-22:35 (2019) - [c22]Pascal Vivet, Gilles Sicard, Laurent Millet, Stéphane Chevobbe, Karim Ben Chehida, Luis Angel Cubero, Monte Alegre, Maxence Bouvier, Alexandre Valentian, Maria Lepecq, Thomas Dombek, Olivier Bichler, Sébastien Thuries, Didier Lattard, Séverine Cheramy, Perrine Batude, Fabien Clermidy:
Advanced 3D Technologies and Architectures for 3D Smart Image Sensors. DATE 2019: 674-679 - 2018
- [c21]Elisa Vianello, Denys R. B. Ly, Selina La Barbera, Thomas Dalgaty, Niccolo Castellani, Gabriele Navarro, Guillaume Bourgeois, Alexandre Valentian, Etienne Nowak, Damien Querlioz:
Metal Oxide Resistive Memory (OxRAM) and Phase Change Memory (PCM) as Artificial Synapses in Spiking Neural Networks. ICECS 2018: 561-564 - 2017
- [c20]Thomas Mesquida, Alexandre Valentian, David Bol, Edith Beigné:
Architecture exploration of a fixed point computation unit using precise timing spiking neurons. PATMOS 2017: 1-8 - 2016
- [j8]Sebastien Bernard, Marc Belleville, Jean-Didier Legat, Alexandre Valentian, David Bol:
Ultra-wide voltage range pulse-triggered flip-flops and register file with tunable energy-delay target in 28 nm UTBB-FDSOI. Microelectron. J. 57: 76-86 (2016) - [c19]Gerald Cibrario, Nour Ben Salem, Joris Lacord, Karim Azizi-Mourier, Olivier Rozeau, Etienne Maurin, Olivier Billoint, Sébastien Thuries, Alexandre Valentian:
From 2D to monolithic 3D predictive design platform: An innovative migration methodology for benchmark purpose. 3DIC 2016: 1-5 - 2015
- [j7]Edith Beigné, Alexandre Valentian, Ivan Miro Panades, Robin Wilson, Philippe Flatresse, Fady Abouzeid, Thomas Benoist, Christian Bernard, Sebastien Bernard, Olivier Billoint, Sylvain Clerc, Bastien Giraud, Anuj Grover, Julien Le Coz, Jean-Philippe Noel, Olivier Thomas, Yvain Thonnart:
A 460 MHz at 397 mV, 2.6 GHz at 1.3 V, 32 bits VLIW DSP Embedding F MAX Tracking. IEEE J. Solid State Circuits 50(1): 125-136 (2015) - [j6]Samer Houri, Gérard Billiot, Marc Belleville, Alexandre Valentian, Hervé Fanet:
Limits of CMOS Technology and Interest of NEMS Relays for Adiabatic Logic Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(6): 1546-1554 (2015) - [c18]Edith Beigné, Jean-Frédéric Christmann, Alexandre Valentian, Olivier Billoint, Esteve Amat, Dominique Morche:
UTBB FDSOI technology flexibility for ultra low power internet-of-things applications. ESSDERC 2015: 164-167 - [c17]Samer Houri, Gérard Billiot, Marc Belleville, Alexandre Valentian, Hervé Fanet:
Power-Clock Generator Impact on the Performance of NEM-Based Quasi-Adiabatic Logic Circuits. RC 2015: 267-272 - 2014
- [j5]Sebastien Bernard, Alexandre Valentian, David Bol, Jean-Didier Legat, Marc Belleville:
A Robust and Energy Efficient Pulse-Triggered Flip-Flop Design for Ultra Low Voltage Operations. J. Low Power Electron. 10(1): 118-126 (2014) - [c16]Fabien Clermidy, Rodolphe Héliot, Alexandre Valentian, Christian Gamrat, Olivier Bichler, Marc Duranton, Bilel Belhadj, Olivier Temam:
Advanced technologies for brain-inspired computing. ASP-DAC 2014: 563-569 - [c15]Bilel Belhadj, Alexandre Valentian, Pascal Vivet, Marc Duranton, Liqiang He, Olivier Temam:
The improbable but highly appropriate marriage of 3D stacking and neuromorphic accelerators. CASES 2014: 1:1-1:9 - [c14]Sébastien Sarrazin, Samuel Evain, Ivan Miro Panades, Alexandre Valentian, Suresh Pajaniradja, Lirida Alves de Barros Naviner, Valentin Gherman:
Shadow-scan design with low latency overhead and in-situ slack-time monitoring. ETS 2014: 1-6 - [c13]Robin Wilson, Edith Beigné, Philippe Flatresse, Alexandre Valentian, Fady Abouzeid, Thomas Benoist, Christian Bernard, Sebastien Bernard, Olivier Billoint, Sylvain Clerc, Bastien Giraud, Anuj Grover, Julien Le Coz, Ivan Miro Panades, Jean-Philippe Noël, Bertrand Pelloux-Prayer, Philippe Roche, Olivier Thomas, Yvain Thonnart, David Turgis, Fabien Clermidy, Philippe Magarshack:
27.1 A 460MHz at 397mV, 2.6GHz at 1.3V, 32b VLIW DSP, embedding FMAX tracking. ISSCC 2014: 452-453 - [c12]Sebastien Bernard, Marc Belleville, Alexandre Valentian, Jean-Didier Legat, David Bol:
Experimental analysis of flip-flops minimum operating voltage in 28nm FDSOI and the impact of back bias and temperature. PATMOS 2014: 1-7 - 2013
- [c11]Edith Beigné, Alexandre Valentian, Bastien Giraud, Olivier Thomas, Thomas Benoist, Yvain Thonnart, Serge Bernard, Guillaume Moritz, Olivier Billoint, Y. Maneglia, Philippe Flatresse, Jean-Philippe Noel, Fady Abouzeid, Bertrand Pelloux-Prayer, Anuj Grover, Sylvain Clerc, Philippe Roche, Julien Le Coz, Sylvain Engels, Robin Wilson:
Ultra-wide voltage range designs in fully-depleted silicon-on-insulator FETs. DATE 2013: 613-618 - [c10]Sebastien Bernard, Alexandre Valentian, Marc Belleville, David Bol, Jean-Didier Legat:
An efficient metric of setup time for pulsed flip-flops based on output transition time. ICICDT 2013: 9-12 - [c9]Samer Houri, Alexandre Valentian, Hervé Fanet:
Comparing CMOS-Based and NEMS-Based Adiabatic Logic Circuits. RC 2013: 36-45 - [c8]Bertrand Pelloux-Prayer, Alexandre Valentian, Bastien Giraud, Yvain Thonnart, Jean-Philippe Noel, Philippe Flatresse, Edith Beigné:
Fine grain multi-VT co-integration methodology in UTBB FD-SOI technology. VLSI-SoC 2013: 168-173 - 2012
- [c7]Marc Belleville, Olivier Thomas, Alexandre Valentian, Fabien Clermidy:
Design challenges for nano-scale devices. ESSDERC 2012: 69-72 - [c6]Dimitri Soussan, Alexandre Valentian, Sylvain Majcherczak, Marc Belleville:
A mixed LPDDR2 impedance calibration technique exploiting 28nm Fully-Depleted SOI Back-Biasing. ICICDT 2012: 1-4 - 2011
- [c5]Julien Le Coz, Philippe Flatresse, Sylvain Engels, Alexandre Valentian, Marc Belleville, Christine Raynaud, Damien Croain, Pascal Urard:
Comparison of 65nm LP bulk and LP PD-SOI with adaptive power gate body bias for an LDPC codec. ISSCC 2011: 336-337
2000 – 2009
- 2009
- [j4]Edith Beigné, Fabien Clermidy, Hélène Lhermet, Sylvain Miermont, Yvain Thonnart, Xuan-Tu Tran, Alexandre Valentian, Didier Varreau, Pascal Vivet, Xavier Popon, Hugo Lebreton:
An Asynchronous Power Aware and Adaptive NoC Based Circuit. IEEE J. Solid State Circuits 44(4): 1167-1177 (2009) - [j3]Yvain Thonnart, Edith Beigné, Alexandre Valentian, Pascal Vivet:
Power Reduction of Asynchronous Logic Circuits Using Activity Detection. IEEE Trans. Very Large Scale Integr. Syst. 17(7): 893-906 (2009) - [c4]Lionel Cadix, Alexis Farcy, Cédric Bermond, Christine Fuchs, Patrick Leduc, Maxime Rousseau, Myriam Assous, Alexandre Valentian, Julie Roullard, Elie Eid, Nicolas Sillon, Bernard Fléchet, Pascal Ancey:
Modelling of Through Silicon Via RF performance and impact on signal transmission in 3D integrated circuits. 3DIC 2009: 1-7 - 2008
- [j2]Alexandre Valentian, Edith Beigné:
Automatic Gate Biasing of an SCCMOS Power Switch Achieving Maximum Leakage Reduction and Lowering Leakage Current Variability. IEEE J. Solid State Circuits 43(7): 1688-1698 (2008) - [c3]Yvain Thonnart, Edith Beigné, Alexandre Valentian, Pascal Vivet:
Automatic Power Regulation Based on an Asynchronous Activity Detection and its Application to ANOC Node Leakage Reduction. ASYNC 2008: 48-57 - [c2]Edith Beigné, Fabien Clermidy, Sylvain Miermont, Alexandre Valentian, Pascal Vivet, S. Barasinski, F. Blisson, N. Kohli, S. Kumar:
A fully integrated power supply unit for fine grain power management application to embedded Low Voltage SRAMs. ESSCIRC 2008: 138-141 - 2007
- [c1]Alexandre Valentian, Edith Beigné:
Gate bias circuit for an SCCMOS power switch achieving maximum leakage reduction. ESSCIRC 2007: 300-303 - 2004
- [j1]Alexandre Valentian, Olivier Thomas, Andrei Vladimirescu, Amara Amara:
Modeling subthreshold SOI logic for static timing analysis. IEEE Trans. Very Large Scale Integr. Syst. 12(6): 662-669 (2004)
Coauthor Index
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