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ORCIDJürgen Ruf
Person information
- affiliation: University of Tübingen, Wilhelm-Schickard-Institute for Computer Science, Germany
- affiliation: IBM Systems and Technology Group, Boeblingen, Germany
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2010 – 2019
- 2017
[c55]Stefan Huster, Jonas Ströbele, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Using Robustness Testing to Handle Incomplete Verification Results When Combining Verification and Testing Techniques. ICTSS 2017: 54-70- 2015
- [j9]Jörg Behrend, Djones Lettnin, Alexander Grünhage, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Scalable and Optimized Hybrid Verification of Embedded Software. J. Electron. Test. 31(2): 151-166 (2015) - [c54]Hanno Eichelberger, Thomas Kropf, Jürgen Ruf, Thomas Greiner, Wolfgang Rosenstiel:
Efficient Fault Localization During Replay of Embedded Software. EUROMICRO-SEAA 2015: 43-52 - [c53]Stefan Huster, Sebastian Burg, Hanno Eichelberger, Jo Laufenberg, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Efficient Testing of Different Loop Paths. SEFM 2015: 117-131 - 2014
- [c52]Hanno Eichelberger, Jürgen Ruf, Thomas Kropf, Thomas Greiner, Wolfgang Rosenstiel:
Debugger-Based Record Replay and Dynamic Analysis for In-Vehicle Infotainment. ICCSA (5) 2014: 387-401 - [c51]Jörg Behrend, Alexander Grünhage, Douglas Schroeder, Djones Lettnin, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Optimized hybrid verification of embedded software. LATW 2014: 1-6 - [c50]Hanno Eichelberger, Patrick Heckeler, Jürgen Ruf, Stefan Huster, Sebastian Burg, Thomas Kropf, Wolfgang Rosenstiel, Thomas Greiner:
Erkennen von Speicherverletzungen im Testbetrieb von eingebetteter Software. MBMV 2014: 61-70 - [c49]Stefan Huster, Merdin Macic, Sebastian Burg, Hanno Eichelberger, Patrick Heckeler, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Increasing Software Reliability by Integrating Formal Verification and Robustness Testing. MBMV 2014: 125-136 - [c48]Sebastian Burg, Patrick Heckeler, Stefan Huster, Hanno Eichelberger, Jörg Behrend, Jürgen Ruf, Thomas Kropf, Oliver Bringmann:
LoCEG: Local Preprocessing in SAT-Solving through Counter-Example Generation. MBMV 2014: 193-196 - [c47]Stefan Huster, Patrick Heckeler, Hanno Eichelberger, Jürgen Ruf, Sebastian Burg, Thomas Kropf, Wolfgang Rosenstiel:
More Flexible Object Invariants with Less Specification Overhead. SEFM 2014: 302-316 - [e2]Jürgen Ruf, Dirk Allmendinger, Matteo Michel:
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen, MBMV 2014, Böblingen, Germany. Cuvillier 2014 [contents] - 2013
- [c46]Hanno Eichelberger, Patrick Heckeler, Stefan Huster, Sebastian Burg, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Bastian Schlich:
Beschleunigte Robustheitstests für verhaltensbeschreibende Zustandsmaschinen. MBMV 2013: 161-170 - [c45]Stefan Huster, Patrick Heckeler, Jürgen Ruf, Sebastian Burg, Thomas Kropf, Wolfgang Rosenstiel:
A Software Testing Framework to Integrate Formal Verification Results. MBMV 2013: 183-192 - 2012
- [c44]Alexander Grünhage, Jörg Behrend, Patrick Heckeler, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Djones Lettnin:
Optimized Static Parameter Assignment for Semiformal Software Verification. MBMV 2012: 25-35 - 2011
- [j8]Patrick Heckeler, Jörg Behrend, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Roland Weiss:
DWARF-driven Equivalence Checking of UML Statecharts and Software Components. Softwaretechnik-Trends 31(3) (2011) - [c43]Jörg Behrend, Djones Lettnin, Patrick Heckeler, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Scalable hybrid verification for embedded software. DATE 2011: 179-184 - [c42]Jörg Behrend, Patrick Heckeler, Stefan Huster, Djones Lettnin, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Scalable and Extendable Hybrid Verification Platform. MBMV 2011: 259-268 - 2010
- [c41]Stefan Lämmermann, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Alexander Viehl, Alexander Jesser
, Lars Hedrich:
Towards assertion-based verification of heterogeneous system designs. DATE 2010: 1171-1176 - [c40]Patrick Heckeler, Jörg Behrend, Thomas Kropf, Jürgen Ruf, Wolfgang Rosenstiel, Roland J. Weiss:
State-based Analysis and UML-driven Equivalence Checking for C++ State Machines. FM+AM 2010: 49-62
2000 – 2009
- 2009
- [j7]Thomas Schlipf, Markus M. Helms, Jürgen Ruf, M. Klein, Rainer Dorsch, B. Hoppe, Walter Lipponer, S. Boekholt, T. Rower, Manfred H. Walz, S. Junghans:
Design and verification of the IBM System z10 I/O subsystem chips. IBM J. Res. Dev. 53(1): 7 (2009) - [c39]Djones Lettnin, Pradeep Kumar Nalla, Jörg Behrend, Jürgen Ruf, Joachim Gerlach, Thomas Kropf, Wolfgang Rosenstiel, Volker Schönknecht, Stephan Reitemeyer:
Semiformal verification of temporal properties in automotive hardware dependent software. DATE 2009: 1214-1217 - 2008
- [j6]Alexander Jesser, Stefan Lämmermann, Alexander Pacholik, Roland Weiss, Jürgen Ruf, Lars Hedrich, Wolfgang Fengler, Thomas Kropf, Wolfgang Rosenstiel:
Advanced Assertion-Based Design for Mixed-Signal Verification. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 91-A(12): 3548-3555 (2008) - [c38]Djones Lettnin, Pradeep Kumar Nalla, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel, Tobias Kirsten, Volker Schönknecht, Stephan Reitemeyer:
Verification of Temporal Properties in Automotive Embedded Software. DATE 2008: 164-169 - 2007
- [c37]Pradeep Kumar Nalla, Jörg Behrend, Prakash Mohan Peranandam, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Grid Based Fast Falsification For Bounded Property Checking. FDL 2007: 299-304 - [c36]Djones Lettnin, Markus Winterholer, Axel G. Braun, Joachim Gerlach, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Coverage Driven Verification applied to Embedded Software. ISVLSI 2007: 159-164 - [c35]Rainer Dorsch, Jürgen Ruf:
Transaction Modeling and RTL Simulation Analysis. MBMV 2007: 1-8 - [c34]Djones Lettnin, Pradeep Kumar Nalla, Jürgen Ruf, Roland J. Weiss, Axel G. Braun, Joachim Gerlach, Thomas Kropf, Wolfgang Rosenstiel:
Semiformal Verification of Temporal Properties in Embedded Software. MBMV 2007: 19-28 - [c33]Stefan Lämmermann, Jörg Behrend, Roland J. Weiss, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
UML/SysML-Systemanalyse zur Generierung von formalen Verifikationseigenschaften für verschiedene Abstraktionsebenen. MBMV 2007: 29-38 - 2006
- [c32]Prakash Mohan Peranandam, Pradeep Kumar Nalla, Jürgen Ruf, Roland J. Weiss, Thomas Kropf, Wolfgang Rosenstiel:
Fast falsification based on symbolic bounded property checking. DAC 2006: 1077-1082 - [c31]Paul Duplys, Roland J. Weiss, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Monitoring-based Formal Hardware Verification. MBMV 2006: 217-221 - [c30]Stefan Lämmermann, Roland J. Weiss, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Automatische Eigenschaftsextraktion auf Systemebene aus SystemC Modellen. MBMV 2006: 222-226 - 2005
- [c29]Roland J. Weiss, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Efficient and Customizable Integration of Temporal Properties. FDL 2005: 385-397 - [c28]Prakash Mohan Peranandam, Pradeep Kumar Nalla, Roland J. Weiss, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Overlap reduction in symbolic system traversal. HLDVT 2005: 145-152 - [c27]Pradeep Kumar Nalla, Roland J. Weiss, Prakash Mohan Peranandam, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Distributed Symbolic Bounded Property Checking. PDMC@ICALP 2005: 47-63 - 2004
- [c26]Stephan Flake, Wolfgang Müller, Ulrich Pape, Jürgen Ruf:
Specification and Formal Verification of Temporal Properties of Production Automation Systems. SoftSpez Final Report 2004: 206-226 - [c25]Jürgen Ruf, Roland J. Weiss, Thomas Kropf, Wolfgang Rosenstiel:
Modeling and Formal Verification of Production Automation Systems. SoftSpez Final Report 2004: 541-566 - [c24]Prakash Mohan Peranandam, Roland J. Weiss, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Dynamic guiding of bounded property checking. HLDVT 2004: 15-18 - [c23]Prakash Mohan Peranandam, Roland J. Weiss, Jürgen Ruf, Thomas Kropf:
Transactional Level Verification and Coverage Metrics by Means of Symbolic Simulation. MBMV 2004: 260-269 - 2003
- [j5]Jürgen Ruf, Thomas Kropf:
Symbolic Verification and Analysis of Discrete Timed Systems. Formal Methods Syst. Des. 23(1): 67-108 (2003) - [j4]Andreas Krebs, Jürgen Ruf:
Optimized Temporal Logic Compilation. J. Univers. Comput. Sci. 9(2): 120-137 (2003) - [c22]Jürgen Ruf, Prakash Mohan Peranandam, Thomas Kropf, Wolfgang Rosenstiel:
Using Symbolic Simulation for Bounded Property Checking. FDL 2003: 374-385 - [c21]Jürgen Ruf, Prakash Mohan Peranandam:
Bounded Property Checking with Symbolic Simulation. MBMV 2003: 209-218 - 2002
- [c20]Jürgen Ruf, Thomas Kropf:
Formal Data Analysis of Timed Finite State Systems. ECRTS 2002: 257- - [c19]Jürgen Ruf, Thomas Kropf, Jochen Klose:
A Visual Approach to Validating System Level Designs. ISSS 2002: 186-191 - [c18]Jürgen Ruf, Thomas Kropf:
Combination of Simulation and Formal Verification. MBMV 2002: 134-143 - [e1]Jürgen Ruf:
Methoden und Beschreibungssprachen zur Modellierung und Verifikation von Schaltungen und Systemen (MBMV), Tübingen, Germany, February 25-27, 2002. Shaker 2002 [contents] - 2001
- [j3]Jürgen Ruf, Thomas Kropf:
Formale Verifikation diskreter Echtzeitsysteme (Formal Verification of Discrete Real-Time Systems). Informationstechnik Tech. Inform. 43(1): 39-46 (2001) - [j2]Jürgen Ruf:
RAVEN: Real-Time Analyzing and Verification Environment. J. Univers. Comput. Sci. 7(1): 89-104 (2001) - [j1]Wolfgang Reif, Gerhard Schellhorn, Tobias Vollmer, Jürgen Ruf:
Correctness of Efficient Real-Time Model Checking. J. Univers. Comput. Sci. 7(2): 194-209 (2001) - [c17]Jürgen Ruf, Dirk W. Hoffmann, Joachim Gerlach, Thomas Kropf, Wolfgang Rosenstiel, Wolfgang Müller:
The simulation semantics of systemC. DATE 2001: 64-70 - [c16]Jürgen Ruf, Dirk W. Hoffmann, Thomas Kropf, Wolfgang Rosenstiel:
Simulation-guided property checking based on a multi-valued AR-automata. DATE 2001: 742-748 - [c15]Jürgen Ruf:
Data Analysis of Timed Finite State Systems. MBMV (1) 2001: 11-20 - [c14]Stephan Flake, Christian Geiger, Wolfgang Müller, Volker Paelke, Waldemar Rosenbach, Jürgen Ruf:
Customer-Oriented Systems Design through Virtual Prototypes. WETICE 2001: 263-268 - 2000
- [b1]Jürgen Ruf:
Techniken zur Modellierung und Verifikation von Echtzeitsystemen. Karlsruhe Institute of Technology, Germany, Logos-Verlag 2000, ISBN 978-3-89722-325-7, pp. 1-230 - [c13]Jürgen Ruf, Thomas Kropf:
Analyzing Real-Time Systems. DATE 2000: 243-248 - [c12]Dirk W. Hoffmann, Jürgen Ruf, Thomas Kropf, Wolfgang Rosenstiel:
Simulation Meets Verification: Checking Temporal Properties in SystemC. EUROMICRO 2000: 1435- - [c11]Wolfgang Reif, Jürgen Ruf, Gerhard Schellhorn, Tobias Vollmer:
Do You Trust Your Model Checker? FMCAD 2000: 179-196 - [c10]Jürgen Ruf, Dirk W. Hoffmann, Thomas Kropf, Wolfgang Rosenstiel:
Checking temporal properties under simulation of executable system descriptions. HLDVT 2000: 161-166 - [c9]Jürgen Ruf:
A Toolset for the Symbolic Examination of Finite State Transition Systems. MBMV 2000: 69-78 - [c8]Stephan Flake, Wolfgang Müller, Jürgen Ruf:
Structured English for Model Checking Specification. MBMV 2000: 99-108
1990 – 1999
- 1999
- [c7]Jürgen Ruf, Thomas Kropf:
Modleing and Checking Networks of Communicating Real-Time Process. CHARME 1999: 265-279 - [c6]Jürgen Ruf, Thomas Kropf:
Modeling Real-Time Systems with I/O-Interval Structures. MBMV 1999: 91-100 - 1998
- [c5]Jürgen Ruf, Thomas Kropf:
Using MTBDDs for Compostion and Model Checking of Real-Time Systems. FMCAD 1998: 185-202 - [c4]Thomas Kropf, Jürgen Ruf, Klaus Schneider, Markus Wild:
A Synchronous Language for Modeling and Verifying Real Time and Embedded Systems. MBMV 1998: 11-20 - 1997
- [c3]Jürgen Ruf, Thomas Kropf:
Symbolic model checking for a discrete clocked temporal logic with intervals. CHARME 1997: 146-163 - [c2]Thomas Kropf, Jürgen Ruf:
Using MTBDDs for discrete timed symbolic model checking. ED&TC 1997: 182-187 - [c1]Jürgen Ruf, Thomas Kropf:
A New Algorithm for Discrete Timed Symbolic Model Checking. HART 1997: 18-32
Coauthor Index
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