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ORCIDAniruddha N. Udipi
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2020 – today
- 2023
[c9]Sagar Karandikar
, Aniruddha N. Udipi, Junsun Choi, Joonho Whangbo, Jerry Zhao, Svilen Kanev, Edwin Lim, Jyrki Alakuijala, Vrishab Madduri, Yakun Sophia Shao, Borivoje Nikolic, Krste Asanovic, Parthasarathy Ranganathan:
CDPU: Co-designing Compression and Decompression Processing Units for Hyperscale Systems. ISCA 2023: 39:1-39:17
2010 – 2019
- 2014
- [c8]Andreas Hansson, Neha Agarwal, Aasheesh Kolli, Thomas F. Wenisch, Aniruddha N. Udipi:
Simulating DRAM controllers for future system architecture exploration. ISPASS 2014: 201-210 - 2013
- [c7]Manjunath Shevgoor, Jung-Sik Kim, Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis, Aniruddha N. Udipi:
Quantifying the relationship between the power delivery network and architectural policies in a 3D-stacked memory device. MICRO 2013: 198-209 - 2012
- [b1]Aniruddha N. Udipi:
Designing Efficient Memory for Future Computing Systems. University of Utah, USA, 2012 - [c6]Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi:
LOT-ECC: Localized and tiered reliability mechanisms for commodity memory systems. ISCA 2012: 285-296 - 2011
- [c5]Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi:
Combining memory and a controller with photonics through 3D-stacking to enable scalable and energy-efficient systems. ISCA 2011: 425-436 - 2010
- [c4]Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev Balasubramonian:
Towards scalable, energy-efficient, bus-based on-chip networks. HPCA 2010: 1-12 - [c3]Aniruddha N. Udipi, Naveen Muralimanohar, Niladrish Chatterjee, Rajeev Balasubramonian, Al Davis, Norman P. Jouppi:
Rethinking DRAM design and organization for energy-constrained multi-cores. ISCA 2010: 175-186
2000 – 2009
- 2009
- [c2]Aniruddha N. Udipi, Naveen Muralimanohar, Rajeev Balasubramonian:
Non-uniform power access in large caches with low-swing wires. HiPC 2009: 59-68 - [c1]Niti Madan, Li Zhao, Naveen Muralimanohar, Aniruddha N. Udipi, Rajeev Balasubramonian, Ravishankar R. Iyer, Srihari Makineni, Donald Newell:
Optimizing communication and capacity in a 3D stacked reconfigurable cache hierarchy. HPCA 2009: 262-274
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