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2020 – today
- 2023
[j24]Georgios Venitourakis
, Christoforos Vasilakis, Alexandros Tsagkaropoulos, Tzouma Amrou, George E. Konstantoulakis, Panagiotis Golemis, Dionysios I. Reisis:
Neural Network-Based Solar Irradiance Forecast for Edge Computing Devices. Inf. 14(11): 617 (2023)- 2022
- [j23]Angelos Kyriakos, Elissaios-Alexios Papatheofanous, Charalampos Bezaitis, Dionysios I. Reisis:
Resources and Power Efficient FPGA Accelerators for Real-Time Image Classification. J. Imaging 8(4): 114 (2022) - [j22]Konstantina Kanta, Panagiotis Toumasis, Giannis Giannoulis, Ioannis Stratakos, George Lentaris, Elissaios-Alexios Papatheofanous, Ioanna Mesogiti, Eleni Theodoropoulou, Aristotelis Margaris, Dimitris Syrivelis, E. Kyriazi, Giorgos Brestas, Kostas Tokas, Nikolaos Argyris, Christos Vagionas, Ronis T. Maximidis, Paraskevas Bakopoulos, Agapi Mesodiakaki, Marios Gatzianas, George Kalfas, Kostas Tsagkaris, Nikos Pleros, Dionysios I. Reisis, George L. Lyberopoulos, Dimitrios Apostolopoulos, Dimitrios Soudris, Hercules Avramopoulos:
Live demonstration of an SDN-reconfigurable, FPGA-based TxRx for an analog-IFoF/mmWave radio access network in an MNO's infrastructure. JOCN 15(8): C299-C306 (2022) - [c61]Christos Vagionas, Ronis T. Maximidis, Ioannis Stratakos, Aristotelis Margaris, Agapi Mesodiakaki, Marios Gatzianas, Konstantina Kanta, Panagiotis Toumasis, Giannis Giannoulis, Dimitrios Apostolopoulos, Elissaios-Alexios Papatheofanous, George Lentaris, Dionysios I. Reisis, Dimitrios Soudris, Kostas Tsagkaris, Nikolaos Argyris, Dimitris Syrivelis, Paraskevas Bakopoulos, R. M. Oldenbeuving, C. G. H. Roeloffzen, P. W. L. van Dijk, I. Dimogiannis, A. Kontogiannis, Hercules Avramopoulos, Amalia N. Miliou, Nikos Pleros, George Kalfas:
End-to-End Real-Time Service Provisioning over a SDN-controllable 60 GHz analog FiWi X-haul for 5G Hot-Spot Networks. OFC 2022: 1-3 - [c60]Vasileios Leon, Elissaios-Alexios Papatheofanous, George Lentaris, Charalampos Bezaitis, Nikolaos Mastorakis, Georgios Bampilis, Dionysios I. Reisis, Dimitrios Soudris:
Combining Fault Tolerance Techniques and COTS SoC Accelerators for Payload Processing in Space. VLSI-SoC 2022: 1-6 - [c59]Elissaios-Alexios Papatheofanous, Ph. Tziolos, V. Kalekis, Tzouma Amrou, George E. Konstantoulakis, Georgios Venitourakis, Dionysios I. Reisis:
SoC FPGA Acceleration for Semantic Segmentation of Clouds in Satellite Images. VLSI-SoC 2022: 1-4 - 2021
- [j21]Elissaios-Alexios Papatheofanous, Dionysios I. Reisis, Konstantinos Nikitopoulos:
LDPC Hardware Acceleration in 5G Open Radio Access Network Platforms. IEEE Access 9: 152960-152971 (2021) - [c58]Panagiotis Toumasis, Konstantina Kanta, Kostas Tokas, Ioannis Stratakos, Elissaios-Alexios Papatheofanous, Giannis Giannoulis, Ioanna Mesogiti, Eleni Theodoropoulou, George L. Lyberopoulos, George Lentaris, Dimitrios Apostolopoulos, Dionysios I. Reisis, Dimitrios Soudris, Hercules Avramopoulos:
Demonstration of FPGA-based A-IFoF/mmWave transceiver integration in mobile infrastructure for beyond 5G transport. ECOC 2021: 1-4 - [c57]Vasileios Leon, Charalampos Bezaitis, George Lentaris, Dimitrios Soudris, Dionysios I. Reisis, Elissaios-Alexios Papatheofanous, Angelos Kyriakos, Aubrey Dunne, Arne Samuelsson, David Steenari:
FPGA & VPU Co-Processing in Space Applications: Development and Testing with DSP/AI Benchmarks. ICECS 2021: 1-5 - [c56]Ioannis Stratakos, Elissaios-Alexios Papatheofanous, Dimitrios Danopoulos, George Lentaris, Dionysios I. Reisis, Dimitrios Soudris:
Towards sharing one FPGA SoC for both low-level PHY and high-level AI/ML computing at the edge. MeditCom 2021: 76-81 - [c55]Elissaios-Alexios Papatheofanous, Dionysios I. Reisis, Konstantinos Nikitopoulos:
The LDPC Challenge in Software-Based 5G New Radio Physical Layer Processing. MeditCom 2021: 312-317
2010 – 2019
- 2019
- [j20]Georgios Georgis, George Lentaris, Dionysios I. Reisis:
Acceleration techniques and evaluation on multi-core CPU, GPU and FPGA for image processing and super-resolution. J. Real Time Image Process. 16(4): 1207-1234 (2019) - [c54]Vasileios Kitsakis, Konstantina Kanta, Ioannis Stratakos, Giannis Giannoulis, Dimitrios Apostolopoulos, George Lentaris, Hercules Avramopoulos, Dimitrios Soudris, Dionysios I. Reisis:
Design of a Real-Time DSP Engine on RF-SoC FPGA for 5G Networks. ONDM 2019: 540-551 - [c53]Angelos Kyriakos, Vasileios Kitsakis, Alexandros Louropoulos, Elissaios-Alexios Papatheofanous, Ioannis Patronas, Dionysios I. Reisis:
High Performance Accelerator for CNN Applications. PATMOS 2019: 135-140 - 2018
- [j19]Paraskevas Bakopoulos, Konstantinos Christodoulopoulos, Giada Landi, Muzzamil Aziz, Eitan Zahavi, Domenico Gallico, Richard Pitwon, Konstantinos Tokas, Ioannis Patronas, Marco Capitani, Christos Spatharakis, Konstantinos Yiannopoulos, Kai Wang, Konstantinos Kontodimas, Ioannis Lazarou, Philipp Wieder, Dionysios I. Reisis, Emmanouel Manos Varvarigos, Matteo Biancani, Hercules Avramopoulos:
NEPHELE: An End-to-End Scalable and Dynamically Reconfigurable Optical Architecture for Application-Aware SDN Cloud Data Centers. IEEE Commun. Mag. 56(2): 178-188 (2018) - [j18]Vasileios Kitsakis, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos:
Parallel Memory Accessing for FFT Architectures. J. Signal Process. Syst. 90(11): 1593-1607 (2018) - [c52]Konstantinos Tokas, Christos Spatharakis, Ioannis Patronas, Paraskevas Bakopoulos, Giada Landi, Konstantinos Christodoulopoulos, Marco Capitani, Angelos Kyriakos, Muzzamil Aziz, Richard Pitwon, Domenico Gallico, Dionisios I. Reisis, Emmanouel A. Varvarigos, Eitan Zahavi, Hercules Avramopoulos:
Real Time Demonstration of an End-to-End Optical Datacenter Network with Dynamic Bandwidth Allocation. ECOC 2018: 1-3 - [c51]Vasileios Kitsakis, Elissaios-Alexios Papatheofanous, Dionisios I. Reisis, George Lentaris, Dimitrios Soudris:
Parity Based In-Place FFT Architecture for Continuous Flow Applications. ICECS 2018: 97-100 - [c50]Nikolaos Dimou, Manolis I. A. Lourakis, George Lentaris, Dimitrios Soudris, Dionysios I. Reisis:
Parallel Robust Absolute Orientation on FPGA for Vision and Robotics. ICECS 2018: 665-668 - [c49]Christos Spatharakis, Konstantinos Tokas, Ioannis Patronas, Paraskevas Bakopoulos, Dionysios I. Reisis, Hercules Avramopoulos:
NEPHELE: Vertical Integration and Real-Time Demonstration of an Optical Datacenter Network. ICTON 2018: 1-4 - [c48]Ioannis Patronas, Nikolaos Gkatzios, Vasileios Kitsakis, Dionysios I. Reisis, Konstantinos Christodoulopoulos, Emmanouel A. Varvarigos:
Scheduler Accelerator for TDMA Data Centers. PDP 2018: 162-169 - 2017
- [c47]Konstantinos Tokas, Ioannis Patronas, Christos Spatharakis, Dionysios I. Reisis, Paraskevas Bakopoulos, Hercules Avramopoulos:
Slotted TDMA and optically switched network for disaggregated datacenters. ICTON 2017: 1-5 - [c46]Giada Landi, Ioannis Patronas, Kostas Kontodimas, Muzzamil Aziz, Kostas Christodoulopoulos, Angelos Kyriakos, Marco Capitani, Amirreza Fazely Hamedani, Dionysios I. Reisis, Emmanouel A. Varvarigos, Paraskevas Bakopoulos, Hercules Avramopoulos:
SDN control framework with dynamic resource assignment for slotted optical datacenter networks. OFC 2017: 1-2 - 2016
- [j17]Konstantinos Manolopoulos, Dionisios I. Reisis, Vassilios A. Chouliaras:
An efficient multiple precision floating-point Multiply-Add Fused unit. Microelectron. J. 49: 10-18 (2016) - [j16]Georgios Georgis, George Lentaris, Dionysios I. Reisis:
Reduced Complexity Superresolution for Low-Bitrate Video Compression. IEEE Trans. Circuits Syst. Video Technol. 26(2): 332-345 (2016) - [c45]Konstantinos Tokas, Christos Spatharakis, Ioannis Kanakis, Nikolaos Iliadis, Paraskevas Bakopoulos, Hercules Avramopoulos, Ioannis Patronas, Nikolaos Liakopoulos, Dionysios I. Reisis:
A scalable optically-switched datacenter network with multicasting. EuCNC 2016: 265-270 - [c44]Ioannis Patronas, Angelos Kyriakos, Dionysios I. Reisis:
Switching functions of a data center Top-of-Rack (ToR). ICECS 2016: 364-367 - [c43]Themistoklis Melissaris, Iraklis Anagnostopoulos, Dimitrios Soudris, Dionysios I. Reisis:
Agora: Agent and market-based resource management for many-core systems. ICECS 2016: 400-403 - [c42]Ioannis Stratakos, Dionysios I. Reisis, George Lentaris, Konstantinos Maragos, Dimitrios Soudris:
A Co-Design Approach For Rapid Prototyping Of Image Processing On SoC FPGAs. PCI 2016: 57 - 2015
- [j15]Konstantinos Nikitopoulos, Athanasios Karachalios, Dionysios I. Reisis:
Exact Max-Log MAP Soft-Output Sphere Decoding via Approximate Schnorr-Euchner Enumeration. IEEE Trans. Veh. Technol. 64(6): 2749-2753 (2015) - [c41]Georgios Georgis, Georgios Menoutis, Dionysios I. Reisis, Konstantinos S. Tsakalis, Ashfaque Bin Shafique:
Towards real-time neuronal connectivity assessment: A scalable pipelined parallel generalized partial directed coherence engine. ICECS 2015: 13-16 - [c40]Georgios Menoutis, Andreas Foteas, Nikolaos Liakopoulos, Georgios Georgis, Dionysios I. Reisis, George Synnefakis:
A configurable transmitter architecture & organization for XG-PON OLT/ONU/ONT network elements. ICECS 2015: 673-676 - 2014
- [c39]Konstantinos Gyftakis, Iraklis Anagnostopoulos, Dimitrios Soudris, Dionysios I. Reisis:
A MapReduce framework implementation for Network-on-Chip platforms. ICECS 2014: 120-123 - [c38]Dionysios Diamantopoulos, George Economakos, Dionysios I. Reisis:
Using high-level synthesis to build memory and datapath optimized DSP accelerators. ICECS 2014: 714-717 - [c37]Georgios Georgis, Charalambos Tzeranis, Dionysios I. Reisis, George Synnefakis:
XG-PON optical network unit downstream FEC design based on truncated Reed-Solomon code. ICECS 2014: 782-785 - [c36]Georgios Georgis, Dionysios I. Reisis, Panagiotis Skordilakis, Konstantinos S. Tsakalis, Ashfaque Bin Shafique, George Chatzikonstantis, George Lentaris:
Neuronal connectivity assessment for epileptic seizure prevention: Parallelizing the generalized partial directed coherence on many-core platforms. ICSAMOS 2014: 359-366 - 2013
- [c35]Georgios Georgis, George Lentaris, Dionysios I. Reisis:
Single-image super-resolution using low complexity adaptive iterative back-projection. DSP 2013: 1-6 - [c34]Konstantinos Yiannopoulos, Emmanouel A. Varvarigos, Dimitrios Klonidis, Ioannis Tomkos, Maria Spyropoulou, Ioannis Lazarou, Paraskevas Bakopoulos, Hercules Avramopoulos, George Heliotis, L.-P. Dimos, George Agapiou, Georgios Papastergiou, Ilias Koukouvinos, A. Orfanoudakis, Thanasis Oikonomou, Dimitrios Kritharidis, Spyridon Spyridakis, M. Dalakidis, G. Synnefakis, Dionysios I. Reisis, Georgios I. Papadimitriou, Panagiotis G. Sarigiannidis, Christos Liaskos:
PANDA: asymmetric passive optical network for xDSL and FTTH access. Panhellenic Conference on Informatics 2013: 335-342 - 2012
- [j14]Sergio Saponara, Massimo Rovini, Luca Fanucci, Athanasios Karachalios, George Lentaris, Dionysios I. Reisis:
Design and Comparison of FFT VLSI Architectures for SoC Telecom Applications with Different Flexibility, Speed and Complexity Trade-Offs. Circuits Syst. Signal Process. 31(2): 627-649 (2012) - [c33]Konstantinos Manolopoulos, A. Belias, Georgios Georgis, Dionysios I. Reisis, E. G. Anasontzis:
Signal processing for deep-sea observatories with reconfigurable hardware. ICECS 2012: 81-84 - [c32]Nikolaos Polychronakis, Dionysios I. Reisis, Emmanouil Tsilis, Ioannis Zokas:
Conflict free, parallel memory access for radix-2 FFT processors. ICECS 2012: 973-976 - 2011
- [j13]Konstantinos S. Tsakalis, Nikolaos Vlassopoulos, George Lentaris, Dionysios I. Reisis:
A Control-Theoretic Approach for Efficient Design of Filters in DAC and Digital Audio Amplifiers. Circuits Syst. Signal Process. 30(2): 421-438 (2011) - [c31]Vassilios A. Chouliaras, George Lentaris, Dionisios I. Reisis, David Stevens:
Customizing a VLIW Chip Multiprocessor for Motion Estimation Algorithms. ARCS Workshops 2011 - [c30]Georgios Georgis, George Lentaris, Dionysios I. Reisis:
Study of interpolation filters for motion estimation with application in H.264/AVC encoders. ICECS 2011: 9-12 - [c29]Konstantinos Manolopoulos, Dionisios I. Reisis, Vassilios A. Chouliaras:
An efficient multiple precision floating-point multiplier. ICECS 2011: 153-156 - [c28]Dionysios Diamantopoulos, Panagiotis Galiatsatos, Athanasios Karachalios, George Lentaris, Dionisios I. Reisis, Dimitrios Soudris:
Configurable baseband digital transceiver for Gbps wireless 60 GHz communications. ICECS 2011: 192-195 - 2010
- [j12]George Lentaris, Dionysios I. Reisis:
A Graphics Parallel Memory Organization Exploiting Request Correlations. IEEE Trans. Computers 59(6): 762-775 (2010) - [j11]Konstantinos Babionitakis, Vassilios A. Chouliaras, Konstantinos Manolopoulos, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos:
Fully Systolic FFT Architecture for Giga-sample Applications. J. Signal Process. Syst. 58(3): 281-299 (2010) - [c27]Konstantinos Manolopoulos, Dionysios I. Reisis, Vassilios A. Chouliaras:
An efficient dual-mode floating-point Multiply-Add Fused Unit. ICECS 2010: 5-8 - [c26]Nikolaos Polychronakis, Dionysios I. Reisis, Emmanouil Tsilis:
A continuous-flow, Variable-Length FFT SDF architecture. ICECS 2010: 730-733
2000 – 2009
- 2009
- [c25]Vassilios A. Chouliaras, Panagiotis Galiatsatos, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos:
Efficient cascaded VLSI FFT architecture for OFDM systems. ICECS 2009: 97-100 - [c24]Anargyros Drolapas, George Lentaris, Dionysios I. Reisis:
Programmable Motion Estimation architecture. ICECS 2009: 323-326 - [c23]David Stevens, Nick Glynn, Panagiotis Galiatsatos, Vassilios A. Chouliaras, Dionysios I. Reisis:
Evaluating the performance of a configurable, extensible VLIW processor in FFT execution. ICECS 2009: 771-774 - [c22]Vassilios A. Chouliaras, Konstantinos Manolopoulos, Dionysios I. Reisis:
A configurable length, Fused Multiply-Add floating point unit for a VLIW processor. SoCC 2009: 93-96 - 2008
- [j10]Vassilios A. Chouliaras, Vincent M. Dwyer, Shahrukh Agha, José L. Núñez-Yáñez, Dionysios I. Reisis, Konstantinos Nakos, Konstantinos Manolopoulos:
Customization of an embedded RISC CPU with SIMD extensions for video encoding: A case study. Integr. 41(1): 135-152 (2008) - [j9]Konstantinos Babionitakis, Gregory Doumenis, George Georgakarakos, George Lentaris, Konstantinos Nakos, Dionysios I. Reisis, Ioannis Sifnaios, Nikolaos Vlassopoulos:
A real-time motion estimation FPGA architecture. J. Real Time Image Process. 3(1-2): 3-20 (2008) - [j8]Konstantinos Babionitakis, Gregory Doumenis, George Georgakarakos, George Lentaris, Konstantinos Nakos, Dionysios I. Reisis, Ioannis Sifnaios, Nikolaos Vlassopoulos:
A real-time H.264/AVC VLSI encoder architecture. J. Real Time Image Process. 3(1-2): 43-59 (2008) - [j7]Dionysios I. Reisis, Nikolaos Vlassopoulos:
Conflict-Free Parallel Memory Accessing Techniques for FFT Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(11): 3438-3447 (2008) - [c21]Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos:
Addressing technique for parallel memory accessing in radix-2 FFT processors. ICECS 2008: 53-56 - 2007
- [c20]Konstantinos Manolopoulos, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos, Vassilios A. Chouliaras:
High Performance 16K, 64K, 256K complex points VLSI Systolic FFT Architectures. ICECS 2007: 146-149 - 2006
- [c19]Konstantinos Babionitakis, George Lentaris, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos, Gregory Doumenis, George Georgakarakos, John Sifnaios:
An Efficient H.264 VLSI Advanced Video Encoder. ICECS 2006: 545-548 - [c18]Konstantinos Babionitakis, Konstantinos Manolopoulos, Konstantinos Nakos, Dionysios I. Reisis, Nikolaos Vlassopoulos, Vassilios A. Chouliaras:
A High Performance VLSI FFT Architecture. ICECS 2006: 810-813 - [c17]Dionysios I. Reisis, Nikolaos Vlassopoulos:
Address Generation Techniques for Conflict Free Parallel Memory Accessing in FFT Architectures. ICECS 2006: 1188-1191 - [c16]Nikolaos Vlassopoulos, Dionysios I. Reisis, George Lentaris, George S. Tombras, Evangelos A. Prosalentis, N. Ritas, Konstantinos S. Tsakalis:
An approach for efficient design of digital amplifiers. ISCAS 2006 - 2003
- [j6]Theofanis Orphanoudakis, Stylianos Perissakis, Kostas Pramataris, Nikos A. Nikolaou, Nicholas Zervos, Matthias Steck, Christoph Baumhof, Diederik Verkest, Chantal Ykman-Couvreur, Gregory Doumenis, Fotis Karoubalis, Ioanna Theologitou, Dionisios I. Reisis, George E. Konstantoulakis, Nikos Vogiatzis:
Hardware Architectures for the Efficient Implementation of Multi-Service Broadband Access and Multimedia Home Networks. Telecommun. Syst. 23(3-4): 351-367 (2003) - [j5]A. Chorevas, Dionysios I. Reisis:
Efficient Systolic Array Mapping of FIR Filters Used in PAM-QAM Modulators. J. VLSI Signal Process. 35(2): 179-186 (2003) - [c15]George Lykakis, N. Mouratidis, Kyriakos Vlachos, Nikos A. Nikolaou, Stylianos Perissakis, G. Sourdis, George E. Konstantoulakis, Dionisios N. Pnevmatikatos, Dionisios I. Reisis:
Efficient Field Processing Cores in an Innovative Protocol Processor System-on-Chip. DATE 2003: 20014-20019 - [c14]Fotis Andritsopoulos, C. Charopoulos, Gregory Doumenis, Fotis Karoubalis, Yannis Mitsos, F. Petreas, Ioanna Theologitou, Stylianos Perissakis, Dionisios I. Reisis:
Verification of a Complex SoC: The PRO3 Case-Study. DATE 2003: 20224-20231 - [c13]Konstantinos Babionitakis, Y. Dagres, Konstantinos Nakos, Dionysios I. Reisis:
A VLSI architecture for minimizing the transmission power in OFDM transceivers. ICECS 2003: 308-311 - 2001
- [j4]Gregory Doumenis, George E. Konstantoulakis, G. Korinthios, George Lykakis, Dionisios I. Reisis, G. Synnefakis:
A Parallel VLSI Video/Communication Controller. J. VLSI Signal Process. 28(3): 245-257 (2001)
1990 – 1999
- 1999
- [c12]I. Despotopoulos, G. Korinthios, I. Nasios, Dionysios I. Reisis:
Developing an Efficient Model for Evaluating WWW Search Engines. Applied Informatics 1999: 87-89 - [c11]George Lykakis, Kostas Pramataris, Dionisios I. Reisis, George I. Stassinopoulos, G. Synnefakis, Euripides Zervanos:
Design and Implementation of a Low-Cost Highly-Modular ATM Access Node Switch. Applied Informatics 1999: 400-402 - [c10]Gregory Doumenis, George E. Konstantoulakis, G. Korinthios, George Lykakis, Dionysios I. Reisis, G. Synnefakis:
An efficient component (IN-RAM) for buffer management and multi-protocol implementation in ATM systems. ICECS 1999: 93-96 - 1996
- [c9]George E. Konstantoulakis, Dionysios I. Reisis:
An array based system for real time buffer management. ICECS 1996: 160-163 - [c8]George E. Konstantoulakis, Kostas Pramataris, Dionisios I. Reisis, Georgios I. Stassinopoulos:
An efficient shared-buffer for high speed ATM networks. ICECS 1996: 776-779 - [c7]A. Chorevas, Dionisios I. Reisis, E. G. Metaxakis:
An efficient digital FIR filter design for 64 QAM. ICECS 1996: 900-903 - 1994
- [j3]S. N. Metallinos, Dionisios I. Reisis, George I. Stassinopoulos:
An Efficient Network Analyser Based on Linear Array Architecture. Parallel Algorithms Appl. 2(1-2): 139-147 (1994) - 1993
- [j2]Russ Miller, Viktor K. Prasanna, Dionisios I. Reisis, Quentin F. Stout:
Parallel Computations on Reconfigurable Meshes. IEEE Trans. Computers 42(6): 678-692 (1993) - 1992
- [c6]Dionisios I. Reisis:
An Efficient Convex Hull Computation on the Reconfigurable Mesh. IPPS 1992: 142-145 - 1991
- [c5]Dionisios I. Reisis:
Improved Graph Computations on the Reconfigurable Mesh. IPPS 1991: 26-29
1980 – 1989
- 1989
- [j1]Viktor K. Prasanna, Dionisios I. Reisis:
Image Computations on Meshes with Multiple Broadcast. IEEE Trans. Pattern Anal. Mach. Intell. 11(11): 1194-1202 (1989) - 1988
- [c4]Russ Miller, V. K. Prasanna Kumar, Dionysios I. Reisis, Quentin F. Stout:
Image computations on reconfigurable VLSI arrays. CVPR 1988: 925-930 - [c3]Russ Miller, Viktor K. Prasanna, Dionisios I. Reisis, Quentin F. Stout:
Data Movement Operations and Applications on Reconfigurable VLSI Arrays. ICPP (1) 1988: 205-208 - 1987
- [c2]Dionisios I. Reisis, Viktor K. Prasanna:
Parallel Image Processing On Enhanced Arrays. ICPP 1987: 909-912 - [c1]Dionisios I. Reisis, Viktor K. Prasanna:
VLSI Arrays with Reconfigurable Buses. ICS 1987: 732-743
Coauthor Index
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