default search action

combined dblp search
author search
venue search
publication search

ask others

Chia-Hsien Liu

> Home > Persons

Person information

Refine list

refinements active!

zoomed in on ?? of ?? records

view refined list in

export refined list as

showing all ?? records

2000 – 2009

see FAQ

What is the meaning of the colors in the publication lists?

2005
[c2]
- view
  authority control:
- export record
  dblp key:
  - conf/glvlsi/LinCLHCLLJ05
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/glvlsi/LinCLHCLLJ05
Tay-Jyi Lin, Chie-Min Chao, Chia-Hsien Liu, Pi-Chen Hsiao, Shin-Kai Chen, Li-Chun Lin, Chih-Wei Liu, Chein-Wei Jen:
A unified processor architecture for RISC & VLIW DSP. ACM Great Lakes Symposium on VLSI 2005: 50-55
[c1]
- view
  authority control:
- export record
  dblp key:
  - conf/iscas/LiuLCHLCHLJ05
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/iscas/LiuLCHLCHLJ05
Chia-Hsien Liu, Tay-Jyi Lin, Chie-Min Chao, Pi-Chen Hsiao, Li-Chun Lin, Shin-Kai Chen, Chao-Wei Huang, Chih-Wei Liu, Chein-Wei Jen:
Hierarchical instruction encoding for VLIW digital signal processors. ISCAS (4) 2005: 3503-3506

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.