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Milos Stanisavljevic
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2020 – today
- 2024
- [c21]Pascal Alexander Hager, Bert Moons, Stefan Cosemans, Ioannis A. Papistas, Bram Rooseleer, Jeroen Van Loon, Roel Uytterhoeven, Florian Zaruba, Spyridoula Koumousi, Milos Stanisavljevic, Stefan Mach, Sebastiaan Mutsaards, Riduan Khaddam Aljameh, Gua Hao Khov, Brecht Machiels, Cristian Olar, Anastasios Psarras, Sander Geursen, Jeroen Vermeeren, Yi Lu, Abhishek Maringanti, Deepak Ameta, Leonidas Katselas, Noah Hütter, Manuel Schmuck, Swetha Sivadas, Karishma Sharma, Manuel Oliveira, Ramon Aerne, Nitish Sharma, Timir Soni, Beatrice Bussolino, Djordje Pesut, Michele Pallaro, Andrei Podlesnii, Alexios Lyrakis, Yannick Ruffiner, Martino Dazzi, Johannes Thiele, Koen Goetschalckx, Nazareno Bruschi, Jonas Doevenspeck, Bram Verhoef, Stefan Linz, Giuseppe Garcea, Jonathan Ferguson, Ioannis Koltsidas, Evangelos Eleftheriou:
11.3 Metis AIPU: A 12nm 15TOPS/W 209.6TOPS SoC for Cost- and Energy-Efficient Inference at the Edge. ISSCC 2024: 212-214 - 2023
- [j7]Shubham Jain, Hsinyu Tsai, Ching-Tzu Chen, Ramachandran Muralidhar, Irem Boybat, Martin M. Frank, Stanislaw Wozniak, Milos Stanisavljevic, Praneet Adusumilli, Pritish Narayanan, Kohji Hosokawa, Masatoshi Ishii, Arvind Kumar, Vijay Narayanan, Geoffrey W. Burr:
A Heterogeneous and Programmable Compute-In-Memory Accelerator Architecture for Analog-AI Using Dense 2-D Mesh. IEEE Trans. Very Large Scale Integr. Syst. 31(1): 114-127 (2023) - [c20]Nikolaos Papandreou, Jan van Lunteren, Andreea Anghel, Thomas P. Parnell, Martin Petermann, Milos Stanisavljevic, Cédric Lichtenau, Andrew Sica, Dominic Röhm, Elpida Tzortzatos, Haralampos Pozidis:
Acceleration of Decision-Tree Ensemble Models on the IBM Telum Processor. ISCAS 2023: 1-5 - 2022
- [j6]Riduan Khaddam-Aljameh, Milos Stanisavljevic, Jordi Fornt Mas, Geethan Karunaratne, Matthias Brändli, Feng Liu, Abhairaj Singh, Silvia M. Müller, Urs Egger, Anastasios Petropoulos, Theodore Antonakopoulos, Kevin Brew, Samuel Choi, Injo Ok, Fee Li Lie, Nicole Saulnier, Victor Chan, Ishtiaq Ahsan, Vijay Narayanan, S. R. Nandakumar, Manuel Le Gallo, Pier Andrea Francese, Abu Sebastian, Evangelos Eleftheriou:
HERMES-Core - A 1.59-TOPS/mm2 PCM on 14-nm CMOS In-Memory Compute Core Using 300-ps/LSB Linearized CCO-Based ADCs. IEEE J. Solid State Circuits 57(4): 1027-1038 (2022) - [i1]Manuel Le Gallo, Riduan Khaddam-Aljameh, Milos Stanisavljevic, Athanasios Vasilopoulos, Benedikt Kersting, Martino Dazzi, Geethan Karunaratne, Matthias Braendli, Abhairaj Singh, Silvia M. Mueller, Julian Büchel, Xavier Timoneda Comas, Vinay Joshi, Urs Egger, Angelo Garofalo, Anastasios Petropoulos, Theodore Antonakopoulos, Kevin Brew, Samuel Choi, Injo Ok, Timothy Philip, Victor Chan, Mary Claire Silvestre, Ishtiaq Ahsan, Nicole Saulnier, Vijay Narayanan, Pier Andrea Francese, Evangelos Eleftheriou, Abu Sebastian:
A 64-core mixed-signal in-memory compute chip based on phase-change memory for deep neural network inference. CoRR abs/2212.02872 (2022) - 2021
- [j5]Katie Spoon, Hsinyu Tsai, An Chen, Malte J. Rasch, Stefano Ambrogio, Charles Mackin, Andrea Fasoli, Alexander M. Friz, Pritish Narayanan, Milos Stanisavljevic, Geoffrey W. Burr:
Toward Software-Equivalent Accuracy on Transformer-Based Deep Neural Networks With Analog Memory Devices. Frontiers Comput. Neurosci. 15: 675741 (2021) - [j4]Haralampos Pozidis, Nikolaos Papandreou, Milos Stanisavljevic:
Circuit and System-Level Aspects of Phase Change Memory. IEEE Trans. Circuits Syst. II Express Briefs 68(3): 844-850 (2021) - [c19]Thomas Mittelholzer, Milos Stanisavljevic, Nikolaos Papandreou, Haralampos Pozidis:
High-Throughput ECC with Integrated Chipkill Protection for Nonvolatile Memory Arrays. ISCAS 2021: 1-5 - [c18]Riduan Khaddam-Aljameh, Milos Stanisavljevic, Jordi Fornt Mas, Geethan Karunaratne, Matthias Braendli, Femg Liu, Abhairaj Singh, Silvia M. Müller, Urs Egger, Anastasios Petropoulos, Theodore Antonakopoulos, Kevin Brew, Samuel Choi, Injo Ok, Fee Li Lie, Nicole Saulnier, Victor Chan, Ishtiaq Ahsan, Vijay Narayanan, S. R. Nandakumar, Manuel Le Gallo, Pier Andrea Francese, Abu Sebastian, Evangelos Eleftheriou:
HERMES Core - A 14nm CMOS and PCM-based In-Memory Compute Core using an array of 300ps/LSB Linearized CCO-based ADCs and local digital processing. VLSI Circuits 2021: 1-2 - 2020
- [c17]Nikolaos Papandreou, Haralampos Pozidis, Nikolas Ioannou, Thomas P. Parnell, Roman A. Pletka, Milos Stanisavljevic, Radu Stoica, Sasa Tomic, Patrick Breen, Gary A. Tressler, Aaron Fry, Timothy Fisher, Andrew Walls:
Open Block Characterization and Read Voltage Calibration of 3D QLC NAND Flash. IRPS 2020: 1-6
2010 – 2019
- 2019
- [j3]Evangelos Eleftheriou, Manuel Le Gallo, S. R. Nandakumar, Christophe Piveteau, Irem Boybat, Vinay Joshi, Riduan Khaddam-Aljameh, Martino Dazzi, Iason Giannopoulos, Geethan Karunaratne, Benedikt Kersting, Milos Stanisavljevic, Vara Prasad Jonnalagadda, Nikolas Ioannou, Kornilios Kourtis, Pier Andrea Francese, Abu Sebastian:
Deep learning acceleration based on in-memory computing. IBM J. Res. Dev. 63(6): 7:1-7:16 (2019) - [c16]Nikolas Ioannou, Milos Stanisavljevic, Andreea Anghel, Nikolaos Papandreou, Sonali Andani, Jan Hendrik Rüschoff, Peter Wild, Maria Gabrani, Haralampos Pozidis:
Accelerated ML-Assisted Tumor Detection in High-Resolution Histopathology Images. MICCAI (1) 2019: 406-414 - [c15]Nikolaos Papandreou, Nikolas Ioannou, Thomas P. Parnell, Roman A. Pletka, Milos Stanisavljevic, Radu Stoica, Sasa Tomic, Haralampos Pozidis:
Reliability of 3D NAND flash memory with a focus on read voltage calibration from a system aspect. NVMTS 2019: 1-4 - 2018
- [c14]Milos Stanisavljevic, Andreea Anghel, Nikolaos Papandreou, Sonali Andani, Pushpak Pati, Jan Hendrik Rüschoff, Peter Wild, Maria Gabrani, Haralampos Pozidis:
A Fast and Scalable Pipeline for Stain Normalization of Whole-Slide Images in Histopathology. ECCV Workshops (6) 2018: 424-436 - [c13]Milos Stanisavljevic, Thomas Mittelholzer, Nikolaos Papandreou, Thomas P. Parnell, Haralampos Pozidis:
Drift-Invariant Detection for Multilevel Phase-Change Memory. ISCAS 2018: 1-5 - 2016
- [j2]Aravinthan Athmanathan, Milos Stanisavljevic, Nikolaos Papandreou, Haralampos Pozidis, Evangelos Eleftheriou:
Multilevel-Cell Phase-Change Memory: A Viable Technology. IEEE J. Emerg. Sel. Topics Circuits Syst. 6(1): 87-100 (2016) - 2015
- [c12]Junho Cheon, Insoo Lee, Changyong Ahn, Milos Stanisavljevic, Aravinthan Athmanathan, Nikolaos Papandreou, Haris Pozidis, Evangelos Eleftheriou, Min-Chul Shin, Taekseung Kim, Jong-Ho Kang, Jun Hyun Chun:
Non-resistance metric based read scheme for multi-level PCRAM in 25 nm technology. CICC 2015: 1-4 - [c11]Milos Stanisavljevic, Aravinthan Athmanathan, Nikolaos Papandreou, Haralampos Pozidis, Evangelos Eleftheriou:
Phase-change memory: Feasibility of reliable multilevel-cell storage and retention at elevated temperatures. IRPS 2015: 5 - 2014
- [c10]Aravinthan Athmanathan, Milos Stanisavljevic, Junho Cheon, Seokjoon Kang, Changyong Ahn, Junghyuk Yoon, Min-Chul Shin, Taekseung Kim, Nikolaos Papandreou, Haris Pozidis, Evangelos Eleftheriou:
A 6-bit drift-resilient readout scheme for multi-level Phase-Change Memory. A-SSCC 2014: 137-140 - 2010
- [c9]Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici:
Selective redundancy-based design techniques for the minimization of local delay variations. ISCAS 2010: 2486-2489 - [c8]Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici:
Output probability density functions of logic circuits: Modeling and fault-tolerance evaluation. VLSI-SoC 2010: 328-334
2000 – 2009
- 2009
- [j1]Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici:
On the Reliability of Post-CMOS and SET Systems. Int. J. Nanotechnol. Mol. Comput. 1(2): 43-57 (2009) - [c7]Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici:
Optimization of Nanoelectronic Systems Reliability Under Massive Defect Density Using Distributed R-fold Modular Redundancy (DRMR). DFT 2009: 340-348 - [c6]Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici:
Optimization of Nanoelectronic Systems Reliability by Reducing Logic Depth. NanoNet 2009: 70-75 - 2008
- [c5]Slobodan Lukovic, Nikola Puzovic, Milos Stanisavljevic:
An Enhanced Service Provider Communication Interface with Client Prioritization - Case Study on Fast-food Chain Restaurants. ICE-B 2008: 197-202 - 2007
- [c4]Milos Stanisavljevic, Frank K. Gürkaynak, Alexandre Schmid, Yusuf Leblebici, Maria Gabrani:
Design and realization of a fault-tolerant 90nm CMOS cryptographic engine capable of performing under massive defect density. ACM Great Lakes Symposium on VLSI 2007: 204-207 - [c3]Milos Stanisavljevic, Frank Kagan Gürkaynak, Alexandre Schmid, Yusuf Leblebici, Maria Gabrani:
A 90nm CMOS cryptographic core with improved fault-tolerance in presence of massive defect density. Nano-Net 2007: 4 - 2006
- [c2]Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici:
Fault-Tolerance of Robust Feed-Forward Architecture Using Single-Ended and Differential Deep-Submicron Circuits Under Massive Defect Density. IJCNN 2006: 2771-2778 - 2005
- [c1]Milos Stanisavljevic, Alexandre Schmid, Yusuf Leblebici:
A Methodology for Reliability Enhancement of Nanometer-Scale Digital Systems Based on a-priori Functional Fault- Tolerance Analysis. VLSI-SoC 2005: 111-125
Coauthor Index
aka: Haris Pozidis
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