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Yoshikazu Tezuka
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1990 – 1999
- 1995
- [j17]Jianchao Zeng, Hidehiko Sanada, Yoshikazu Tezuka, Guangyou Xu:
A form-correcting system of Chinese characters using a model of correcting procedures of calligraphists. J. Comput. Sci. Technol. 10(1): 23-34 (1995) - [j16]Hidehiko Zeng, Hidehiko Sanada, Yoshikazu Tezuka:
A form evaluation system and its data structure for brush-written Chinese characters. J. Comput. Sci. Technol. 10(1): 35-41 (1995) - 1993
- [j15]Hiroshi Kurokawa, Noboru Babaguchi, Yoshikazu Tezuka:
A knowledge-based system for envisioning network flow. Syst. Comput. Jpn. 24(6): 47-59 (1993) - [c18]Miki Yamamoto, Toshihito Hirata, Chikara Ohta, Hideki Tode, Hiromi Okada, Yoshikazu Tezuka:
Traffic Control Scheme for Interconnection of FDDI Networks through an ATM Network. INFOCOM 1993: 411-420 - [c17]Chikara Ohta, Hideki Tode, Miki Yamamoto, Hiromi Okada, Yoshikazu Tezuka:
A Peak Rate Regulation Scheme for ATM Networks and Its Performance. INFOCOM 1993: 680-689 - [c16]Akira Ishida, Miki Yamamoto, Hiromi Okada, Kouichi Mutsuura, Yoshikazu Tezuka:
Immediate transmission scheme of s-ALOHA with PCT method. ISCAS 1993: 2228-2231 - 1992
- [j14]Shin-ya Kobayashi, Hikaru Nakanishi, Yoshikazu Tezuka, Takashi Watanabe:
Modeling and analyzing advance processing control by extended message-passing. Syst. Comput. Jpn. 23(6): 1-13 (1992) - [j13]Shin-ya Kobayashi, Hikaru Nakanishi, Yoshikazu Tezuka, Makoto Furukawa:
Permanent time-stamp ordering mechanism. Syst. Comput. Jpn. 23(9): 1-10 (1992) - [j12]Takenao Ohkawa, Kazuhiko Koizumi, Noboru Babaguchi, Yoshikazu Tezuka:
Constructing hierarchies for incomplete frames. Syst. Comput. Jpn. 23(12): 29-43 (1992) - [c15]Takenao Ohkawa, Toshiaki Mori, Noboru Babaguchi, Yoshikazu Tezuka:
Analogical Generalization. FGCS 1992: 497-504 - [c14]Koichi Kise, Masaki Yamaoka, Noboru Babaguchi, Yoshikazu Tezuka:
Model based system for analyzing document images. ICPR (2) 1992: 647-650 - [c13]Hideki Tode, Yasuharu Sakai, Miki Yamamoto, Hiromi Okada, Yoshikazu Tezuka:
Multicast Routing Algorithm for Nodal Load Balancing. INFOCOM 1992: 2086-2095 - 1991
- [j11]Noboru Babaguchi, Koji Yamada, Koichi Kise, Yoshikazu Tezuka:
Connectionist Model Binarization. Int. J. Pattern Recognit. Artif. Intell. 5(4): 629-644 (1991) - [j10]Miki Yamamoto, Hideki Tode, Hiromi Okada, Yoshikazu Tezuka:
A Control-Ahead ATM Switch Architecture and Its Performance. IEEE J. Sel. Areas Commun. 9(9): 1549-1559 (1991) - [j9]Hiroyuki Yamada, Yoshikazu Tezuka:
Functional model-based assistance for modifying software. Syst. Comput. Jpn. 22(13): 82-92 (1991) - [c12]Kazuhiro Ohtsuki, Kouichi Takemura, James F. Kurose, Hiromi Okada, Yoshikazu Tezuka:
A High-Speed Packet Switch Architecture with a Multichannel Bandwidth Allocation. INFOCOM 1991: 155-162 - [c11]Takenao Ohkawa, Toshiaki Mori, Noboru Babaguchi, Yoshikazu Tezuka:
Class Directed Generalization. SCAI 1991: 266-276 - 1990
- [j8]Takashi Watanabe, Sadao Hizuka, Hidehiko Sanada, Yoshikazu Tezuka:
Time-event driven scheme for distributed simulation with advance processing. Syst. Comput. Jpn. 21(1): 1-12 (1990) - [c10]Noboru Babaguchi, Koji Yamada, Koichi Kise, Yoshikazu Tezuka:
Connectionist model binarization. ICPR (2) 1990: 51-56 - [c9]Koichi Kise, Ken'ichi Momota, Masaki Yamaoka, Jun'ichi Sugiyama, Noboru Babaguchi, Yoshikazu Tezuka:
Model Based Understanding of Document Images. MVA 1990: 471-474
1980 – 1989
- 1989
- [j7]Seiichiro Dan, Takahira Yamaguchi, Osamu Kakusho, Yoshikazu Tezuka:
Program verification system with synthesizer of invariant assertions. Syst. Comput. Jpn. 20(1): 1-13 (1989) - [j6]Chanintorn Jittawiriyanukoon, Hikaru Nakanishi, Yoshikazu Tezuka, Takashi Watanabe:
Approximate performance evaluation of parallel processing systems using average concurrency. Syst. Comput. Jpn. 20(11): 21-32 (1989) - [c8]Chanintorn Jittawiriyanukoon, Takashi Watanabe, Hikaru Nakanishi, Yoshikazu Tezuka:
Approximate Analytic Method for Computer Systems with Multiple Level Concurrent Programs. INFOCOM 1989: 82-90 - [c7]Hiromi Okada, Suvepon Saekol, Yoshikazu Tezuka:
Performance Considerations on Resolvable-Contention-Ring Networks for Fiber Optic LANs. INFOCOM 1989: 1029-1037 - 1988
- [j5]Takashi Watanabe, Hikaru Nakanishi, Hidehiko Sanada, Yoshikazu Tezuka:
Simulation language based on logic for queueing network using time object. Syst. Comput. Jpn. 19(6): 1-13 (1988) - [c6]Jianchao Zeng, Takeshi Inoue, Hidehiko Sanada, Yoshikazu Tezuka:
A data structure suitable for representing the calligraphic rules for Chinese character evaluation. ICPR 1988: 181-183 - [c5]Koichi Kise, Koji Yamada, Naoki Tanaka, Noboru Babaguchi, Yoshikazu Tezuka:
Visiting card understanding system. ICPR 1988: 425-429 - [c4]Yukuo Hayashida, Shumji Fujii, Yoshikazu Tezuka:
Delay performance of a continuous ARQ system with copy-transmissions. INFOCOM 1988: 714-721 - 1987
- [j4]Kei Sato, Hikaru Nakanishi, Hidehiko Sanada, Yoshikazu Tezuka:
D-SSQ: A queueing network simulator with parallel execution control. Syst. Comput. Jpn. 18(3): 19-29 (1987) - [j3]Takashi Watanabe, Hikaru Nakanishi, Hidehiko Sanada, Yoshikazu Tezuka:
Performance evaluation of asynchronous distributed processing system with limited-advance processing. Syst. Comput. Jpn. 18(9): 74-85 (1987) - 1986
- [j2]Hiroshi Suzuki, Hikaru Nakanishi, Hidehiko Sanada, Yoshikazu Tezuka, Ichiro Akiyoshi:
Delay Analysis of Wait System Model for Window-Controlled Packet Network and Optimal Window Allocation. Syst. Comput. Jpn. 17(3): 17-25 (1986) - [c3]Miki Yamamoto, Hikaru Nakanishi, Hidehiko Sanada, Yoshikazu Tezuka, Ichiro Akiyoshi:
Delay Analysis of Window Controlled Network with Finite Input Buffer. ICC 1986: 1852-1857 - 1985
- [c2]Takahira Yamaguchi, Yoshikazu Tezuka, Osamu Kakusho:
Parallel Processing of Resolution. IJCAI 1985: 1178-1180 - 1980
- [c1]Seiichi Uchinami, Yoshikazu Tezuka:
Linguistic Model Based On The Generative Topological Information Space. COLING 1980: 93-100
1960 – 1969
- 1966
- [j1]Jun'ichi Toyoda, Yoshikazu Tezuka, Yoshiro Kasahara:
Analysis of the Address Assignment Problem for Clustered Keys. J. ACM 13(4): 526-532 (1966)
Coauthor Index
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