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Myung-Kyu Lee
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2020 – today
- 2023
- [j6]Yesin Ryu, Sung-Gi Ahn, Jae Hoon Lee, Jaewon Park, Yong-Ki Kim, Hyochang Kim, Yeong Geol Song, Han-Won Cho, Sunghye Cho, Seung Ho Song, Haesuk Lee, Useung Shin, Jonghyun Ahn, Je-Min Ryu, Suk Han Lee, Kyounghwan Lim, Jungyu Lee, Jeong Hoan Park, Jae-Seung Jeong, Sunghwan Jo, Dajung Cho, Sooyoung Kim, Minsu Lee, Hyunho Kim, Minhwan Kim, Jae San Kim, Jinah Kim, Hyun Gil Kang, Myung-Kyu Lee, Sung-Rae Kim, Young-Cheon Kwon, Young-Yong Byun, Kijun Lee, Sangkil Park, Jaeyoun Youn, Myeong-O. Kim, Kyomin Sohn, SangJoon Hwang, JooYoung Lee:
A 16 GB 1024 GB/s HBM3 DRAM With Source-Synchronized Bus Design and On-Die Error Control Scheme for Enhanced RAS Features. IEEE J. Solid State Circuits 58(4): 1051-1061 (2023) - 2022
- [c4]Yesin Ryu, Young-Cheon Kwon, Jae Hoon Lee, Sung-Gi Ahn, Jaewon Park, Kijun Lee, Yu Ho Choi, Han-Won Cho, Jae San Kim, Jungyu Lee, Haesuk Lee, Seung Ho Song, Je-Min Ryu, Yeong Ho Yun, Useung Shin, Dajung Cho, Jeong Hoan Park, Jae-Seung Jeong, Suk Han Lee, Kyounghwan Lim, Tae-Sung Kim, Kyungmin Kim, Yu Jin Cha, Ik Joo Lee, Tae Kyu Byun, Han Sik Yoo, Yeong Geol Song, Myung-Kyu Lee, Sunghye Cho, Sung-Rae Kim, Ji-Min Choi, Hyoungmin Kim, Soo Young Kim, Jaeyoun Youn, Myeong-O. Kim, Kyomin Sohn, SangJoon Hwang, JooYoung Lee:
A 16 GB 1024 GB/s HBM3 DRAM with On-Die Error Control Scheme for Enhanced RAS Features. VLSI Technology and Circuits 2022: 130-131 - 2020
- [c3]Chi-Sung Oh, Ki Chul Chun, Young-Yong Byun, Yong-Ki Kim, So-Young Kim, Yesin Ryu, Jaewon Park, Sinho Kim, Sang-uhn Cha, Dong-Hak Shin, Jungyu Lee, Jong-Pil Son, Byung-Kyu Ho, Seong-Jin Cho, Beomyong Kil, Sungoh Ahn, Baekmin Lim, Yong-Sik Park, Kijun Lee, Myung-Kyu Lee, Seungduk Baek, Junyong Noh, Jae-Wook Lee, Seungseob Lee, Sooyoung Kim, Bo-Tak Lim, Seouk-Kyu Choi, Jin-Guk Kim, Hye-In Choi, Hyuk-Jun Kwon, Jun Jin Kong, Kyomin Sohn, Nam Sung Kim, Kwang-Il Park, Jung-Bae Lee:
22.1 A 1.1V 16GB 640GB/s HBM2E DRAM with a Data-Bus Window-Extension Technique and a Synergetic On-Die ECC Scheme. ISSCC 2020: 330-332
2010 – 2019
- 2016
- [c2]Sung-Rae Kim, Kijun Lee, Gyuyeol Kong, Myung-Kyu Lee, Dongmin Shin, Geunyeong Yu, Beomkyu Shin, Pilsang Yoon, Hongrak Son, Jun Jin Kong:
A post-processing algorithm for reducing strong error effects in NAND flash memory. APCCAS 2016: 465-468 - 2014
- [j5]Myung-Kyu Lee, Kyeongcheol Yang:
The exponent of a polarizing matrix constructed from the Kronecker product. Des. Codes Cryptogr. 70(3): 313-322 (2014) - 2012
- [j4]Myung-Kyu Lee, Seung-Chan Lim, Kyeongcheol Yang:
Blind Compensation for Phase Noise in OFDM Systems over Constant Modulus Modulation. IEEE Trans. Commun. 60(3): 620-625 (2012) - 2011
- [j3]Myung-Kyu Lee, Kyeongcheol Yang, Kyungwhoon Cheun:
Iterative Receivers Based on Subblock Processing for Phase Noise Compensation in OFDM Systems. IEEE Trans. Commun. 59(3): 792-802 (2011) - [i1]Myung-Kyu Lee, Kyeongcheol Yang:
The Exponent of a Polarizing Matrix Constructed from the Kronecker Product. CoRR abs/1108.3417 (2011) - 2010
- [j2]Myung-Kyu Lee, Kyeongcheol Yang:
Scheduling for an Adaptive Number of Iterations in Turbo Equalizers Combined with LDPC Decoders. IEEE Trans. Commun. 58(10): 2759-2764 (2010)
2000 – 2009
- 2009
- [j1]Hyun-Koo Yang, Myung-Kyu Lee, Kyeongcheol Yang:
Gallager's decoding algorithm Α over high order modulations. IEEE Commun. Lett. 13(5): 336-338 (2009) - [c1]Myung-Kyu Lee, Kyeongcheol Yang:
Adaptive turbo equalizer with stopping rule based on LDPC codes. ISIT 2009: 928-932
Coauthor Index
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