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ORCIDMohammad Sadegh Jalali
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2010 – 2019
- 2018
[c7]Mohammad Sadegh Jalali, Mohammad Hossein Taghavi, Angus McLaren, Jennifer Pham, Kamran Farzan, Dominic DiClemente, Marcus van Ierssel, William Song, Saman Asgaran, Chris D. Holdenried, Saman Sadr:
A 4-Lane 1.25-to-28.05Gb/s multi-standard 6pJ/b 40dB transceiver in 14nm FinFET with independent TX/RX rate support. ISSCC 2018: 106-108- 2017
- [c6]Mohammad Sadegh Jalali, Masum Hossain, Kenneth Dyer, Saman Sadr:
High speed ADCs for wireline applications. MWSCAS 2017: 579-582 - 2015
- [j4]Joshua Liang
, Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
On-Chip Measurement of Clock and Data Jitter With Sub-Picosecond Accuracy for 10 Gb/s Multilane CDRs. IEEE J. Solid State Circuits 50(4): 845-855 (2015) - [j3]Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
A Reference-Less Single-Loop Half-Rate Binary CDR. IEEE J. Solid State Circuits 50(9): 2037-2047 (2015) - [j2]Mohammad Sadegh Jalali, Clifford Ting, Joshua Liang, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
A 3x blind ADC-based CDR for a 20 dB loss channel. IEEE Trans. Circuits Syst. I Regul. Pap. 62-I(6): 1658-1667 (2015) - 2014
- [j1]Ravi Shivnaraine, Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
An 8-11 Gb/s Reference-Less Bang-Bang CDR Enabled by "Phase Reset". IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(7): 2129-2138 (2014) - [c5]Clifford Ting, Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
A blind ADC-based CDR with digital data interpolation and adaptive CTLE and DFE. CICC 2014: 1-4 - [c4]Joshua Liang, Mohammad Sadegh Jalali, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
On-chip measurement of data jitter with sub-picosecond accuracy for 10Gb/s multilane CDRs. VLSIC 2014: 1-2 - 2013
- [c3]Mohammad Sadegh Jalali, Ravi Shivnaraine, Ali Sheikholeslami, Masaya Kibune, Hirotaka Tamura:
An 8mW frequency detector for 10Gb/s half-rate CDR using clock phase selection. CICC 2013: 1-8 - 2011
- [c2]Mohammad Sadegh Jalali, Alireza Sharif Bakhtiar, Shahriar Mirabbasi:
A hybrid phase-locked loop for CDR Applications. ISCAS 2011: 2533-2536 - 2010
- [c1]Alireza Sharif Bakhtiar, Mohammad Sadegh Jalali, Shahriar Mirabbasi:
An RF power harvesting system with input-tuning for long-range RFID tags. ISCAS 2010: 4085-4088
Coauthor Index
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