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2000 – 2009
- 2006
[j4]Cédric Lorand, Peter H. Bauer:
Clock Synchronization Errors in Circuits: Models, Stability and Fault Detection. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(10): 2299-2305 (2006)- [j3]Cédric Lorand, Peter H. Bauer:
On Synchronization Errors in Networked Feedback Systems. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(10): 2306-2317 (2006) - 2005
- [j2]Cédric Lorand, Peter H. Bauer:
Distributed discrete-time systems with synchronization errors: models and stability. IEEE Trans. Circuits Syst. II Express Briefs 52-II(4): 208-212 (2005) - 2004
- [c6]Cédric Lorand, Peter H. Bauer:
A factorization approach to the analysis of asynchronous interconnected discrete-time systems with arbitrary clock ratios. ACC 2004: 349-354 - [c5]Cédric Lorand, Peter H. Bauer:
Interconnected discrete-time systems with incommensurate clock frequencies. CDC 2004: 935-940 - 2003
- [j1]Peter H. Bauer, Cédric Lorand, Mihail L. Sichitiu
, Kamal Premaratne:
Total delay compensation in LAN control systems and implications for scheduling. Int. J. Syst. Sci. 34(10-11): 599-605 (2003) - [c4]Cédric Lorand, Peter H. Bauer:
A model for closed loop discrete time systems with small clock frequency drifts. ACC 2003: 3317-3322 - [c3]Cédric Lorand, Peter H. Bauer:
Stability analysis of closed-loop discrete-time systems with clock frequency drifts. ACC 2003: 3323-3328 - [c2]Peter H. Bauer, Cédric Lorand, Kamal Premaratne:
Stability robustness of interconnected discrete time systems with synchronization errors. ISCAS (4) 2003: 568-571 - 2001
- [c1]Peter H. Bauer, Mihail L. Sichitiu, Cédric Lorand, Kamal Premaratne:
Total delay compensation in LAN control systems and implications for scheduling. ACC 2001: 4300-4305
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