"A Dual-Vt Layout Approach for Statistical Leakage Variability Minimization ..."

Maryam Ashouei et al. (2005)

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DOI: 10.1109/ICCD.2005.6

access: closed

type: Conference or Workshop Paper

metadata version: 2023-03-23

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Maryam Ashouei, Abhijit Chatterjee, Adit D. Singh, Vivek De:
A Dual-Vt Layout Approach for Statistical Leakage Variability Minimization in Nanometer CMOS. ICCD 2005: 567-573

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