"Low-Voltage Limitations and Challenges of Memory-Rich Nano-Scale CMOS LSIs."

Kiyoo Itoh, Riichiro Takemura (2007)

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DOI: 10.1109/ICECS.2007.4511097

access: closed

type: Conference or Workshop Paper

metadata version: 2022-07-07

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Kiyoo Itoh, Riichiro Takemura:
Low-Voltage Limitations and Challenges of Memory-Rich Nano-Scale CMOS LSIs. ICECS 2007: 739-742

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