"Reducing test time with processor reuse in network-on-chip based systems."

Alexandre M. Amory et al. (2004)

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DOI: 10.1145/1016568.1016602

access: closed

type: Conference or Workshop Paper

metadata version: 2022-10-02

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Alexandre M. Amory, Érika F. Cota, Marcelo Lubaszewski, Fernando Gehm Moraes:
Reducing test time with processor reuse in network-on-chip based systems. SBCCI 2004: 111-116

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