• case-insensitive prefix search: default
  e.g., sig matches "SIGIR" as well as "signal"
• exact word search: append dollar sign ($) to word
  e.g., graph$ matches "graph", but not "graphics"
• boolean and: separate words by space
  e.g., codd model
• boolean or: connect words by pipe symbol (|)
  e.g., graph|network

Update May 7, 2017: Please note that we had to disable the phrase search operator (.) and the boolean not operator (-) due to technical problems. For the time being, phrase search queries will yield regular prefix search result, and search terms preceded by a minus will be interpreted as regular (positive) search terms.

found 32 matches

• 1995
• 
  Andreas G. Andreou, Kwabena A. Boahen:
  A 590, 000 transistor 48, 000 pixel, contrast sensitive, edge enhancing, CMOS imager-silicon retina. ARVLSI 1995: 225-240
• 
  William C. Athas, Nestoras Tzartzanis:
  Energy recovery for low-power CMOS. ARVLSI 1995: 415-429
• 
  Michael Bolotski, Thomas Simon, Carlin Vieri, Rajeevan Amirtharajah, Thomas F. Knight Jr.:
  Abacus: a 1024 processor 8 ns SIMD array. ARVLSI 1995: 28-41
• 
  Erik Brunvand:
  Low latency self-timed flow-through FIFOs. ARVLSI 1995: 76-90
• 
  X. Cai, Keith Nabors, Jacob K. White:
  Efficient Galerkin techniques for multipole-accelerated capacitance extraction of 3-D structures with multiple dielectrics. ARVLSI 1995: 200-213
• 
  Huy Cat, Myunghee Lee, Brent Buchanan, D. Scott Wills, Martin A. Brooke, Nan M. Jokerst:
  Silicon VLSI processing architectures incorporating integrated optoelectronic devices. ARVLSI 1995: 17-27
• 
  Gert Cauwenberghs:
  Bit-serial bidirectional A/D/A conversio. ARVLSI 1995: 108-120
• 
  Larry R. Dennison, William J. Dally, Thucydides Xanthopoulos:
  Low-latency plesiochronous data retiming. ARVLSI 1995: 304-315
• 
  H. Dhanesha, K. Falakshahi, Mark Horowitz:
  Array-of-arrays architecture for parallel floating point multiplication. ARVLSI 1995: 150-157
• 
  Alex G. Dickinson, Bryan D. Ackland, El-Sayed Eid, David A. Inglis, Eric R. Fossum:
  Standard CMOS active pixel image sensors for multimedia applications. ARVLSI 1995: 214-224
• 
  Carl Ebeling, Brian Lockyear:
  On the performance of level-clocked circuits. ARVLSI 1995: 342-357
• 
  Robert M. Fuhrer, Bill Lin, Steven M. Nowick:
  Algorithms for the optimal state assignment of asynchronous state machines. ARVLSI 1995: 59-75
• 
  Scott Hauck, Gaetano Borriello:
  An evaluation of bipartitioning techniques. ARVLSI 1995: 383-403
• 
  Kei-Yong Khoo, Alan N. Willson Jr.:
  Single-transistor transparent-latch clocking. ARVLSI 1995: 331-341
• 
  Peter M. Kogge, Toshio Sunaga, Hisatada Miyataka, Koji Kitamura, Eric Retter:
  Combined DRAM and logic chip for massively parallel systems. ARVLSI 1995: 4-16
• 
  Kumar N. Lalgudi, Marios C. Papaefthymiou:
  Efficient retiming under a general delay model. ARVLSI 1995: 368-382
• 
  John Lazzaro, John Wawrzynek:
  A multi-sender asynchronous extension to the AER protocol. ARVLSI 1995: 158-171
• 
  Stan Y. Liao, Srinivas Devadas, Kurt Keutzer:
  Code density optimization for embedded DSP processors using data compression techniques. ARVLSI 1995: 272-285
• 
  Hans Lindkvist, Per Andersson:
  Dynamic CMOS circuit techniques for delay and power reduction in parallel adders . ARVLSI 1995: 121-130
• 
  Louis Monier, Ramsey W. Haddad, Jeremy Dion:
  Recursive layout generation. ARVLSI 1995: 172-184
• 
  José Monteiro, John Rinderknecht, Srinivas Devadas, Abhijit Ghosh:
  Optimization of combinational and sequential logic circuits for low power using precomputation. ARVLSI 1995: 430-444
• 
  Tonia G. Morris, Denise M. Wilson, Stephen P. DeWeerth:
  Analog VLSI circuits for manufacturing inspection. ARVLSI 1995: 241-257
• 
  Gary C. Moyer, Mark Clements, Wentai Liu, Toby Schaffer, Ralph K. Cavin III:
  A technique for high-speed, fine-resolution pattern generation and its CMOS implementation. ARVLSI 1995: 131-149
• 
  Chris J. Myers, Tomas Rokicki, Teresa H.-Y. Meng:
  Automatic synthesis of gate-level timed circuits with choice. ARVLSI 1995: 42-58
• 
  Huy Nguyen, Abhijit Chatterjee:
  OPTIMUS: a new program for OPTIMizing linear circuits with number-splitting and shift-and-add decompositions. ARVLSI 1995: 258-271
• 
  Gill A. Pratt, John Nguyen:
  Distributed synchronous clocking. ARVLSI 1995: 316-330
• 
  Sanjay Rekhi, J. Donald Trotter:
  HAL: heuristic algorithms for layout synthesis. ARVLSI 1995: 185-199
• 
  Ted Stanion, Carl Sechen:
  Quasi-algebraic decompositions of switching functions. ARVLSI 1995: 358-367
• 
  Timothy J. Stanley, Trevor N. Mudge:
  Systematic objective-driven computer architecture optimization. ARVLSI 1995: 286-303
• 
  Jae-Tack Yoo, Ganesh Gopalakrishnan, Kent F. Smith, V. John Mathews:
  High speed counterflow-clocked pipelining illustrated on the design of HDTV subband vector quantizer chips. ARVLSI 1995: 91-107

skipping 2 more matches