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ORCID9th Asia-Pacific Computer Systems Architecture Conference 2004: Beijing, China
- Pen-Chung Yew, Jingling Xue:
Advances in Computer Systems Architecture, 9th Asia-Pacific Conference, ACSAC 2004, Beijing, China, September 7-9, 2004, Proceedings. Lecture Notes in Computer Science 3189, Springer 2004, ISBN 3-540-23003-3
Keynote Address I
- James E. Smith:
Some Real Observations on Virtual Machines. 1
Cache and Memory
- Wei Zhang:
Replica Victim Caching to Improve Reliability of In-Cache Replication. 2-15 - Chunrong Lai, Shih-Lien Lu:
Efficient Victim Mechanism on Sector Cache Organization. 16-29 - Xingyan Tian, Kejia Zhao, Huowang Chen, Hongyan Du:
Cache Behavior Analysis of a Compiler-Assisted Cache Replacement Policy. 30-43 - Diego Andrade, Basilio B. Fraguela, Ramon Doallo:
Modeling the Cache Behavior of Codes with Arbitrary Data-Dependent Conditional Structures. 44-57
Reconfigurable and Embedded Architectures
- Sebastian Wallner:
A Configurable System-on-Chip Architecture for Embedded Devices. 58-71 - Nicolas Ventroux, Stéphane Chevobbe
, Frédéric Blanc, Thierry Collette:
An Auto-adaptative Reconfigurable Architecture for the Control. 72-87 - Ying Chen, Karthik Ranganathan, Vasudev V. Pai, David J. Lilja, Kia Bazargan:
Enhancing the Memory Performance of Embedded Systems with the Flexible Sequential and Random Access Memory. 88-101 - Seong-Yong Ahn, Jun-Yong Kim, Jeong-A Lee:
Heuristic Algorithm for Reducing Mapping Sets of Hardware-Software Partitioning in Reconfigurable System. 102-114
Processor Architecture and Design I
- Jian Chen, Ruhao Xu, Yuzhuo Fu:
Architecture Design of a High-Performance 32-Bit Fixed-Point DSP. 115-125 - Lei Wang, Hongyi Lu, Kui Dai, Zhiying Wang:
TengYue-1TengYue: In Chinese means jump over.: A High Performance Embedded SoC. 126-136 - Wenbin Yao, Dongsheng Wang, Weimin Zheng:
A Fault-Tolerant Single-Chip Multiprocessor. 137-145
Power and Energy Management
- Philip Machanick:
Initial Experiences with Dreamy Memory and the RAMpage Memory Hierarchy. 146-159 - Kui-Yon Mun, Dae Woong Kim, Do-Hun Kim, Chan-Ik Park:
dDVS: An Efficient Dynamic Voltage Scaling Algorithm Based on the Differential of CPU Utilization. 160-169 - Byung-Soo Choi, Jeong-A Lee, Dong-Soo Har:
High Performance Microprocessor Design Methods Exploiting Information Locality and Data Redundancy for Lower Area Cost and Power Consumption. 170-184
Processor Architecture and Design II
- Marc Epalza, Paolo Ienne, Daniel Mlynek:
Dynamic Reallocation of Functional Units in Superscalar Processors. 185-198 - Mei Wen, Nan Wu, Haiyan Li, Chunyuan Zhang:
Multiple-Dimension Scalable Adaptive Stream Architecture. 199-211 - Kentaro Hamayasu, Vasily G. Moshnyaga:
Impact of Register-Cache Bandwidth Variation on Processor Performance. 212-225
Compiler and Operating System Issues
- Youfeng Wu, Yong-Fong Lee:
Exploiting Free Execution Slots on EPIC Processors for Efficient and Accurate Runtime Profiling. 226-240 - Howard Chen, Jiwei Lu, Wei-Chung Hsu, Pen-Chung Yew:
Continuous Adaptive Object-Code Re-optimization Framework. 241-255 - Kevin Elphinstone, Stefan Götz:
Initial Evaluation of a User-Level Device Driver Framework. 256-269
Keynote Address II
- Jesse Zhixi Fang:
A Generation Ahead of Microprocessor: Where Software Can Drive uArchitecture To? 270
Application-Specific Systems
- Byung-Uck Kim, Woo-Chan Park, Sung-Bong Yang, Tack-Don Han:
A Cost-Effective Supersampling for Full Scene AntiAliasing. 271-281 - Stefan Tillich, Johann Großschädl:
A Simple Architectural Enhancement for Fast and Flexible Elliptic Curve Cryptography over Binary Finite Fields GF(2m). 282-295 - Hiroshi Tsutsui, Takahiko Masuzaki, Yoshiteru Hayashi, Yoshitaka Taki, Tomonori Izumi, Takao Onoye, Yukihiro Nakamura:
Scalable Design Framework for JPEG2000 System Architecture. 296-308 - JongSu Yi, JunSeong Kim, Liping Li, John Morris, Gareth Lee, Philippe Leclercq:
Real-Time Three Dimensional Vision. 309-320
Interconnection Networks
- Madhusudhanan Anantha, Bella Bose:
A Router Architecture for QoS Capable Clusters. 321-334 - Zhenghao Zhang, Yuanyuan Yang:
Optimal Scheduling Algorithms in WDM Optical Interconnects with Limited Range Wavelength Conversion Capability. 335-348 - Hashem Hashemi Najaf-abadi, Hamid Sarbazi-Azad:
Comparative Evaluation of Adaptive and Deterministic Routing in the OTIS-Hypercube. 349-362 - Kyoung-Sun Jhang, Kang Yi, Soo Yun Hwang:
A Two-Level On-Chip Bus System Based on Multiplexers. 363-372
Keynote Address III
- Guojie Li:
Make Computers Cheaper and Simpler. 373
Prediction Techniques
- Sung Woo Chung, Sung-Bae Park:
A Low Power Branch Predictor to Selectively Access the BTB. 374-384 - Weidong Shi, Tao Zhang, Santosh Pande:
Static Techniques to Improve Power Efficiency of Branch Predictors. 385-398 - Mongkol Ekpanyapong, Pinar Korkmaz, Hsien-Hsin S. Lee:
Choice Predictor for Free. 399-413 - Yong Xiao, Kun Deng, Xingming Zhou:
Performance Impact of Different Data Value Predictors. 414-425
Parallel Architecture and Programming
- SunHo Baek, KyuHo Lee, JunSeong Kim, John Morris:
Heterogeneous Networks of Workstations. 426-439 - Wu Jigang, Thambipillai Srikanthan:
Finding High Performance Solution in Reconfigurable Mesh-Connected VLSI Arrays. 440-448 - Woo-Chan Park, Tack-Don Han, Sung-Bong Yang:
Order Independent Transparency for Image Composition Parallel Rendering Machines. 449-460 - Changqin Huang, Guanghua Song, Yao Zheng, Deren Chen:
An Authorization Architecture Oriented to Engineering and Scientific Computation in Grid Environments. 461-472
Microarchitecture Design and Evaluations
- Ruby B. Lee, Xiao Yang, Zhijie Shi:
Validating Word-Oriented Processors for Bit and Multi-word Operations. 473-488 - Tzung-Rei Yang, Jong-Jiann Shieh:
Dynamic Fetch Engine for Simultaneous Multithreaded Processors. 489-502 - Zhenyu Liu, Jiayue Qi:
A Novel Rename Register Architecture and Performance Analysis. 503-514
Memory and I/O Systems
- Rui-fang Liu, Changsheng Xie, Zhi-hu Tan, Qing Yang:
A New Hierarchy Cache Scheme Using RAM and Pagefile. 515-526 - Youhui Zhang, Weimin Zheng:
An Object-Oriented Data Storage System on Network-Attached Object Devices. 527-538 - Kiyofumi Tanaka, Toshihide Hagiwara:
A Scalable and Adaptive Directory Scheme for Hardware Distributed Shared Memory. 539-553
Potpourri
- Xiaobin Li, Jean-Luc Gaudiot:
A Compiler-Assisted On-Chip Assigned-Signature Control Flow Checking. 554-567 - Woo-Chan Park, Tack-Don Han, Sung-Bong Yang:
A Floating Point Divider Performing IEEE Rounding and Quotient Conversion in Parallel. 568-581 - Jeong-Gun Lee, Euiseok Kim, Jeong-A Lee, Eunok Paek:
Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization. 582-595
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