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ORCID18th ACSD 2018: Bratislava, Slovakia
- 18th International Conference on Application of Concurrency to System Design, ACSD 2018, Bratislava, Slovakia, June 25-29, 2018. IEEE Computer Society 2018, ISBN 978-1-5386-7013-2
State-Space Construction and Reachability
- Benjamin Smith, Gianfranco Ciardo
:
SOUPS: A Variable Ordering Metric for the Saturation Algorithm. 1-10 - Parosh Aziz Abdulla, C. Aiswarya, Mohamed Faouzi Atig, Marco Montali, Othmane Rezine:
Complexity of Reachability for Data-Aware Dynamic Systems. 11-20
Time
- Étienne André, Didier Lime, Mathias Ramparison:
Timed Automata with Parametric Updates. 21-29 - Hanifa Boucheneb, Didier Lime, Olivier H. Roux, Charlotte Seidner:
Optimal-Cost Reachability Analysis Based on Time Petri Nets. 30-39 - Bram van der Sanden, Marc Geilen, Michel A. Reniers, Twan Basten:
Partial-Order Reduction for Performance Analysis of Max-Plus Timed Systems. 40-49
Process Models
- Vincent Bloemen, Jaco van de Pol, Wil M. P. van der Aalst:
Symbolically Aligning Observed and Modelled Behaviour. 50-59 - Dennis Schmitz, Daniel Moldt, Michael Haustermann, David Mosteller, Christian Röder:
Team Coordination Based on Causal Nets with Synchronous Channels. 60-69
Fault, Suspicion and Concurrency!
- Bowen Li, Brian Randell, Anirban Bhattacharyya, Talal Alharbi, Maciej Koutny:
SONCraft: A Tool for Construction, Simulation, and Analysis of Structured Occurrence Nets. 70-74 - Loïc Hélouët, Hervé Marchand, John Mullins:
Concurrent Secrets with Quantified Suspicion. 75-84 - Ayleen Schinko, Walter Vogler:
Fault-Free Refinements for Interface Automata. 85-94
System Design
- Alexander Schulz-Rosengarten, Steven Smyth, Reinhard von Hanxleden, Michael Mendler:
On Reconciling Concurrency, Sequentiality and Determinacy for Reactive Systems - A Sequentially Constructive Circuit Semantics for Esterel. 95-104 - Fatma Jebali, Dumitru Potop-Butucaru:
Ensuring Consistency between Cycle-Accurate and Instruction Set Simulators. 105-114 - Markus Anders, Anoop Bhagyanath, Klaus Schneider:
On Memory Optimal Code Generation for Exposed Datapath Architectures with Buffered Processing Units. 115-124
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