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ORCIDCASES 2001: Atlanta, Georgia, USA
- Guang R. Gao, Trevor N. Mudge, Krishna V. Palem:
Proceedings of the 2001 International Conference on Compilers, Architectures and Synthesis for Embedded Systems, CASES 2001, Atlanta, Georgia, USA, November 16-17, 2001. ACM 2001, ISBN 1-58113-399-5
Caches and Memory Systems
- Alberto L. Sangiovanni-Vincentelli, Grant Martin:
A vision for embedded software. 1-7 - Harry Dwyer, John Fernando:
Establishing a tight bound on task interference in embedded system instruction caches. 8-14 - Jan Sjödin, Carl von Platen:
Storage allocation for embedded processors. 15-23 - Timothy Sherwood
, Brad Calder:
Patchable instruction ROM architecture. 24-33 - Oren Avissar, Rajeev Barua, Dave Stewart:
Heterogeneous memory management for embedded systems. 34-43 - Sadagopan Srinivasan, Vinodh Cuppu, Bruce L. Jacob:
Transparent data-memory organizations for digital signal processors. 44-48
Compilers and Optimization
- Klaus Schneider, Michael Wenz:
A new method for compiling schizophrenic synchronous programs. 49-58 - Björn Franke, Michael F. P. O'Boyle:
An empirical evaluation of high level transformations for embedded processors. 59-66 - Zhong Wang, Edwin Hsing-Mean Sha, Xiaobo Hu:
Combined partitioning and data padding for scheduling multiple loop nests. 67-75 - Olaf Lüthje, Martin Coors, Holger Keding:
A novel approach to code analysis of digital signal processing systems. 76-83 - Sungjoon Jung, Yunheung Paek:
The very portable optimizer for digital signal processors. 84-92
Synthesis and Design Tools
- Alberto La Rosa, Luciano Lavagno, Claudio Passerone:
A software development tool chain for a reconfigurable processor. 93-98 - Michael Ward, Neil C. Audsley:
Hardware compilation of sequential Ada. 99-107 - Dirk Fischer, Jürgen Teich, Ralph Weper, Uwe Kastens, Michael Thies:
Design space characterization for architecture/compiler co-exploration. 108-115 - Girish Venkataramani, Walid A. Najjar, Fadi J. Kurdahi, Nader Bagherzadeh, A. P. Wim Böhm:
A compiler framework for mapping applications to a coarse-grained reconfigurable computer architecture. 116-125 - Adam Johnson, Kenneth Mackenzie:
Pattern matching in reconfigurable logic for packet classification. 126-130
Hardware Support
- Friedhelm Stappert, Andreas Ermedahl, Jakob Engblom:
Efficient longest executable path search for programs with complex flows and pipeline effects. 132-140 - Marcio Buss, Rodolfo Azevedo, Paulo Centoducatte, Guido Araujo:
Tailoring pipeline bypassing and functional unit mapping to application in clustered VLIW architectures. 141-148 - Bilge Saglam Akgul, Jaehwan Lee, Vincent John Mooney III:
A system-on-a-chip lock cache with task preemption support. 149-157 - Shail Aditya, Michael S. Schlansker:
ShiftQ: a bufferred interconnect for custom loop accelerators. 158-167 - Heidi Pan, Krste Asanovic:
Heads and tails: a variable-length instruction format supporting parallel fetch and decode. 168-175
Power Management
- Lakshmi N. Chakrapani, Pinar Korkmaz, Vincent John Mooney III, Krishna V. Palem, Kiran Puttaswamy, Weng-Fai Wong:
The emerging power crisis in embedded processors: what can a poor compiler do? 176-180 - Christopher T. Weaver, Rajeev Krishna, Lisa Wu, Todd M. Austin:
Application specific architectures: a recipe for fast, flexible and power efficient designs. 181-185
Electronic Textiles
- Sungmee Park, Sundaresan Jayaraman:
Textiles and computing: background and opportunities for convergence. 186-187 - Kenneth Mackenzie, Eric Hudson, Drew Maule, Sundaresan Jayaraman, Sungmee Park:
A prototype network embedded in textile fabric. 188-194
Power-and Energy-Aware Computing
- Anil Seth, Ravindra B. Keskar, R. Venugopal:
Algorithms for energy optimization using processor instructions. 195-202 - Kathleen Baynes, Chris Collins, Eric Fiterman, Brinda Ganesh, Paul Kohout, Christine Smit, Tiebing Zhang, Bruce L. Jacob:
The performance and energy consumption of three embedded real-time operating systems. 203-210 - Stefanos Kaxiras, Girija J. Narlikar, Alan D. Berenbaum, Zhigang Hu:
Comparing power consumption of an SMT and a CMP DSP for mobile phone workloads. 211-220 - Yann-Hang Lee, Yoonmee Doh, C. Mani Krishna:
EDF scheduling using two-mode voltage-clock-scaling for hard real-time systems. 221-228 - Hyun Suk Kim, Narayanan Vijaykrishnan, Mahmut T. Kandemir, Mary Jane Irwin:
Energy-efficient instruction cache using page-based placement. 229-237 - Zhiyuan Li, Cheng Wang, Rong Xu:
Computation offloading to save energy on handheld devices: a partition scheme. 238-246
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