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ORCIDHPEC 2013: Waltham, MA, USA
- IEEE High Performance Extreme Computing Conference, HPEC 2013, Waltham, MA, USA, September 10-12, 2013. IEEE 2013, ISBN 978-1-4799-1365-7
- Ben Humphries, Martin C. Herbordt:
3D FFT for FPGAs. 1-2 - Da Tong, Viktor K. Prasanna:
Dynamically configurable online statistical flow feature extractor on FPGA. 1-6 - Ling Ren, Christopher W. Fletcher, Xiangyao Yu, Marten van Dijk
, Srinivas Devadas:
Integrity verification for path Oblivious-RAM. 1-6 - Cosmin Nita, Lucian Mihai Itu, Constantin Suciu:
GPU accelerated blood flow computation using the Lattice Boltzmann Method. 1-6 - Saurabh Hukerikar, Pedro C. Diniz, Robert F. Lucas:
Robust graph traversal: Resiliency techniques for data intensive supercomputing. 1-6 - Praveen Sharma, Raoul Ouedraogo, Bradley T. Perry, David Aubin, Todd Levy, Daniel Souza, Jonathan Kitchens, John Peabody:
Miniature radar for mobile devices. 1-8 - Qiuling Zhu, Tobias Graf, Huseyin Ekin Sumbul, Larry T. Pileggi, Franz Franchetti:
Accelerating sparse matrix-matrix multiplication with 3D-stacked logic-in-memory hardware. 1-6 - Xin Fang, Miriam Leeser:
Vendor agnostic, high performance, double precision Floating Point division for FPGAs. 1-5 - Erik G. Boman, Michael M. Wolf:
A nested dissection partitioning method for parallel sparse matrix-vector multiplication. 1-6 - A. Taylor Baldwin, Jeffrey Will, Douglas Tougaw:
An improved eigensolver for quantum-dot cellular automata simulations. 1-6 - Ren Chen, Neungsoo Park, Viktor K. Prasanna:
High throughput energy efficient parallel FFT architecture on FPGAs. 1-6 - Zhilu Chen, James Kingsley, Xinming Huang, Erkan Tüzel:
Accelerating a novel particle-based fluid simulation on the GPU. 1-6 - Wei Wang, Xinming Huang:
A novel fast modular multiplier architecture for 8, 192-bit RSA cryposystem. 1-5 - Alexandros-Stavros Iliopoulos, Jun Hu, Nikos Pitsianis, Xiaobai Sun, Michael E. Gehm, David J. Brady:
Big snapshot stitching with scarce overlap. 1-6 - Scott M. Sawyer, B. David O'Gwynn, An Tran, Tamara Yu:
Understanding query performance in Accumulo. 1-6 - Adam Jacobs, Nicholas Wulf, Alan D. George:
Task scheduling for reconfigurable systems in dynamic fault-rate environments. 1-6 - Harper Langston, Muthu Manikandan Baskaran, Benoît Meister, Nicolas Vasilache, Richard Lethin:
Re-Introduction of communication-avoiding FMM-accelerated FFTs with GPU acceleration. 1-6 - Albert Reuther, Jeremy Kepner, William Arcand, David Bestor, Bill Bergeron, Chansup Byun, Matthew Hubbell, Peter Michaleas, Julie Mullen, Andrew Prout, Antonio Rosa:
LLSuperCloud: Sharing HPC systems for diverse rapid prototyping. 1-6 - Benoît Dupont de Dinechin, Renaud Ayrignac, Pierre-Edouard Beaucamps, Patrice Couvert, Benoit Ganne, Pierre Guironnet de Massas, François Jacquet, Samuel Jones, Nicolas Morey Chaisemartin, Frédéric Riss, Thierry Strudel:
A clustered manycore processor architecture for embedded and accelerated applications. 1-6 - Karen Gettings, Andrew K. Bolstad, Michael N. Ericson, Xiao Wang:
Biquad implementation of an IIR filter for IQ mismatch correction in an SoC RF receiver. 1-5 - Jin Zhao, Sichao Zhu, Xinming Huang:
Real-time traffic sign detection using SURF features on FPGA. 1-6 - Kiran Kumar Matam, Ming Hsieh:
Evaluating energy efficiency of floating point matrix multiplication on FPGAs. 1-6 - Paul Keltcher, David Whelihan, Jeffrey J. Hughes:
Instruction set extensions for photonic synchronous coalesced accesses. 1-4 - Joseph French, William F. Turri, Joseph Fernando, Eric J. Balster:
GPU accelerated elevation map based registration of aerial images. 1-6 - Viral B. Shah, Alan Edelman, Stefan Karpinski, Jeff Bezanson, Jeremy Kepner:
Novel algebras for advanced analytics in Julia. 1-4 - Jeremy Kepner, Christian Anderson, William Arcand, David Bestor, Bill Bergeron, Chansup Byun, Matthew Hubbell, Peter Michaleas, Julie Mullen, B. David O'Gwynn, Andrew Prout, Albert Reuther, Antonio Rosa, Charles Yee:
D4M 2.0 schema: A general purpose high performance schema for the Accumulo database. 1-6 - Richard Skowyra, Sanaz Bahargam, Azer Bestavros:
Software-Defined IDS for securing embedded mobile devices. 1-7 - Tommy MacWilliam, Cris Cecka:
CrowdCL: Web-based volunteer computing with WebCL. 1-6 - Shikha Mehrotra, K. V. Shamjith, Prachi Pandey, B. Asvija, R. Sridharan:
A mechanism to improve the performance of hybrid MPI-OpenMP applications in grid. 1-8 - David A. Kusinsky, Miriam Leeser:
FPGA-based hyperspectral covariance coprocessor for size, weight, and power constrained platforms. 1-6 - Thomas M. Benson, Ryan K. Hersey, Edwin Culpepper:
GPU-based space-time adaptive processing (STAP) for radar. 1-6 - Peng Li, Kevin Gomez, David J. Lilja:
Exploiting free silicon for energy-efficient computing directly in NAND flash-based solid-state storage systems. 1-6 - Ze-ke Wang, Feng Yu, Xue Liu:
Block Processor: A resource-distributed architecture. 1-6 - Krishna Chaitanya Pabbuleti, Deepak Hanamant Mane, Avinash Desai, Curt Albert, Patrick Schaumont:
SIMD acceleration of modular arithmetic on contemporary embedded platforms. 1-6 - Tim Mattson, David A. Bader, Jonathan W. Berry, Aydin Buluç, Jack J. Dongarra, Christos Faloutsos, John Feo, John R. Gilbert, Joseph Gonzalez, Bruce Hendrickson, Jeremy Kepner, Charles E. Leiserson, Andrew Lumsdaine, David A. Padua, Stephen Poole, Steven P. Reinhardt, Mike Stonebraker, Steve Wallach, Andrew Yoo:
Standards for graph algorithm primitives. 1-2 - Julia S. Mullen, Michael M. Wolf, Anna Klein:
PAKCK: Performance and power analysis of key computational kernels on CPUs and GPUs. 1-6 - Arash Shamaei, Bella Bose, Mary Flahive:
Adaptive routing in hexagonal torus interconnection networks. 1-6
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