default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDIntegration, Volume 66
Volume 66, May 2019
- George Floros
, Nestoras E. Evmorfopoulos, Georgios I. Stamoulis:
Efficient IC hotspot thermal analysis via low-rank Model Order Reduction. 1-8 - Chase Cook, Sheriff Sadiqbatcha, Zeyu Sun, Sheldon X.-D. Tan:
Reliability based hardware Trojan design using physics-based electromigration models. 9-15 - Pietro Burrascano, Giulia Di Capua, Nicola Femia, Stefano Laureti, Marco Ricci:
A Pulse Compression procedure for power inductors modeling up to moderate non-linearity. 16-23
- Anindita Chakraborty, Vivek Saurabh, Partha Sarathi Gupta, Rituraj Kumar, Saikat Majumdar, Smriti Das, Hafizur Rahaman:
In-memory designing of Delay and Toggle flip-flops utilizing Memristor Aided loGIC (MAGIC). 24-34 - Kiran Kumar Matam, Mohammad Abdel-Majeed, Murali Annavaram:
Efficient automatic parallelization of a single GPU program for a multiple GPU system. 35-43 - Ke Du, Stéphane Domas, Michel Lenczner:
Actors with stretchable access patterns. 44-59 - Sabir Ali Mondal, Pradip Mandal, Hafizur Rahaman:
Fast locking, startup-circuit free, low area, 32-phase analog DLL. 60-66 - Jiming Xu, Howard M. Heys:
Kernel-based template attacks of cryptographic circuits using static power. 67-79 - Geethu Sathees Babu, Lakshmi Renuka Madala, Gopalakrishnan Lakshminarayanan, Mathini Sellathurai:
Low-complex processing element architecture for successive cancellation decoder. 80-87 - Filipe Guimarães Russo Ramos, Thiago P. Mussolini, Robson Luiz Moreno, Tales Cleber Pimenta:
A CMOS temperature-independent current reference optimized for mixed-signal applications. 88-95 - Hamed Fatemi, Andrew B. Kahng, Hyein Lee, Jiajia Li, José Pineda de Gyvez:
Enhancing sensitivity-based power reduction for an industry IC design context. 96-111 - Zechariah Balan, Harikrishnan Ramiah, Jagadheswaran Rajendran, Nandini Vitee, Pravinah Nair Shasidharan, Jun Yin, Pui-In Mak, Rui Paulo Martins:
A coin-battery-powered LDO-Free 2.4-GHz Bluetooth Low Energy/ZigBee receiver consuming 2 mA. 112-118 - Chaudhry Indra Kumar, Anand Bulusu:
High performance energy efficient radiation hardened latch for low voltage applications. 119-127 - M. Reza Sadeghifar, Håkan Bengtsson, J. Jacob Wikner, Oscar Gustafsson:
Direct digital-to-RF converter employing semi-digital FIR voltage-mode RF DAC. 128-134 - Enahoro Oriero, Syed Rafay Hasan:
Survey on recent counterfeit IC detection techniques and future research directions. 135-152 - Mario Cofano, Marco Vacca, Giulia Santoro, Giovanni Causapruno, Giovanna Turvani, Mariagrazia Graziano:
Exploiting the Logic-In-Memory paradigm for speeding-up data-intensive algorithms. 153-163 - Xing Wei, Haigang Yang, Wei Li, Zhihong Huang, Tao Yin, Le Yu:
A reconfigurable 4-GS/s power-efficient floating-point FFT processor design and implementation based on single-sided binary-tree decomposition. 164-172
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
last updated on 2025-02-15 00:06 CET by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
