The Initial Performance Evaluation of Mixed Multi-Frequency Undifferenced and Uncombined BDS-2/3 Precise Point Positioning under Urban Environmental Conditions - Fuxin Yang; Chuanlei Zheng; Jie Zhang; Zhiguo Sun; Liang Li; Lin Zhao (Remote. Sens., 2022)

Continuity Enhancement Method for Real-Time PPP Based on Zero-Baseline Constraint of Multi-Receiver - Fuxin Yang; Chuanlei Zheng; Hui Li; Liang Li; Jie Zhang; Lin Zhao (Remote. Sens., 2021)

Low Power Aging-Aware On-Chip Memory Structure Design by Duty Cycle Balancing - Shuai Wang; Tao Jin; Chuanlei Zheng; Guangshan Duan (J. Circuits Syst. Comput., 2016)

Characterizing soft error vulnerability of cache coherence protocols for chip-multiprocessors - Chuanlei Zheng; Shuai Wang (2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2014, Amsterdam, The Netherlands, October 1-3, 2014, 2014)

Combating NBTI-induced aging in data caches - Shuai Wang; Guangshan Duan; Chuanlei Zheng; Tao Jin (Great Lakes Symposium on VLSI 2013 (part of ECRC), GLSVLSI'13, Paris, France, May 2-4, 2013, 2013)

Low power aging-aware register file design by duty cycle balancing - Shuai Wang; Tao Jin; Chuanlei Zheng; Guangshan Duan (2012 Design, Automation & Test in Europe Conference & Exhibition, DATE 2012, Dresden, Germany, March 12-16, 2012, 2012)

Exploring hardware transaction processing for reliable computing in chip-multiprocessors against soft errors - Chuanlei Zheng; Parijat Shukla; Shuai Wang; Jie S. Hu (2012 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, DFT 2012, Austin, TX, USA, October 3-5, 2012, 2012)