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Samiran Ganguly
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2020 – today
- 2024
- [c6]Faiyaz E. Mullick, Rahul Sreekumar, Md Golam Morshed, Samiran Ganguly, Mircea Stan, Avik W. Ghosh:
Double magnetic tunnel junction based ∑Δ∑ hardware neuron. DRC 2024: 1-2 - [i12]Rahnuma Rahman, Samiran Ganguly, Supriyo Bandyopadhyay:
Reconfigurable Stochastic Neurons Based on Strain Engineered Low Barrier Nanomagnets. CoRR abs/2402.06168 (2024) - [i11]Kemal Selcuk, Saleh Bunaiyan, Nihal Singh, Shehrin Sayed, Samiran Ganguly, Giovanni Finocchio, Supriyo Datta, Kerem Yunus Çamsari:
Connecting physics to systems with modular spin-circuits. CoRR abs/2404.19345 (2024) - 2023
- [i10]Giovanni Finocchio, Supriyo Bandyopadhyay, Peng Lin, Gang Pan, J. Joshua Yang, Riccardo Tomasello, Christos Panagopoulos, Mario Carpentieri, Vito Puliafito, Johan Åkerman, Hiroki Takesue, Amit Ranjan Trivedi, Saibal Mukhopadhyay, Kaushik Roy, Vinod K. Sangwan, Mark C. Hersam, Anna Giordano, Huynsoo Yang, Julie Grollier, Kerem Yunus Çamsari, Peter L. McMahon, Supriyo Datta, Jean Anne C. Incorvia, Joseph S. Friedman, Sorin Cotofana, Florin Ciubotaru, Andrii V. Chumak, Azad J. Naeemi, Brajesh Kumar Kaushik, Yao Zhu, Kang Wang, Belita Koiller, Gabriel Aguilar, Guilherme P. Temporão, Kremena Makasheva, Aida Todri-Sanial, Jennifer Hasler, William Levy, Vwani Roychowdhury, Samiran Ganguly, Avik W. Ghosh, Davi Rodriquez, Satoshi Sunada, Karin Everschor-Sitte, Amit Lal, Shubham Jadhav, Massimiliano Di Ventra, Yuriy V. Pershin, Kosuke Tatsumura, Hayato Goto:
Roadmap for Unconventional Computing with Nanotechnology. CoRR abs/2301.06727 (2023) - [i9]Md Golam Morshed, Samiran Ganguly, Avik W. Ghosh:
Choose your tools carefully: A Comparative Evaluation of Deterministic vs. Stochastic and Binary vs. Analog Neuron models for Implementing Emerging Computing Paradigms. CoRR abs/2302.05056 (2023) - [i8]Md Golam Morshed, Samiran Ganguly, Avik W. Ghosh:
A Deep Dive into the Computational Fidelity of High Variability Low Energy Barrier Magnet Technology for Accelerating Optimization and Bayesian Problems. CoRR abs/2302.08074 (2023) - 2021
- [j1]Samiran Ganguly, Kerem Yunus Çamsari, Avik W. Ghosh:
Analog Signal Processing Using Stochastic Magnets. IEEE Access 9: 92640-92650 (2021) - 2020
- [c5]Samiran Ganguly, Avik W. Ghosh:
Building Reservoir Computing Hardware Using Low Energy-Barrier Magnetics. ICONS 2020: 17:1-17:8 - [c4]Samiran Ganguly, Nikhil Shukla, Avik W. Ghosh:
Ultra-Compact, Scalable, Energy-Efficient $VO_{2}$ Insulator-Metal-Transition Oxide Based Spiking Neurons for Liquid State Machines. VLSI-SOC 2020: 147-152 - [i7]Hamed Vakili, Mohammad Nazmus Sakib, Samiran Ganguly, Mircea Stan, Matthew W. Daniels, Advait Madhavan, Mark D. Stiles, Avik W. Ghosh:
Temporal Memory with Magnetic Racetracks. CoRR abs/2005.10704 (2020) - [i6]Samiran Ganguly, Avik W. Ghosh:
Building Reservoir Computing Hardware Using Low Energy-Barrier Magnetics. CoRR abs/2007.02766 (2020)
2010 – 2019
- 2018
- [c3]Samiran Ganguly, Yunfei Gu, Yunkun Xie, Mircea R. Stan, Avik W. Ghosh, Nibir K. Dhar:
Reservoir Computing Based Neural Image Filters. IECON 2018: 3206-3210 - [i5]Samiran Ganguly, Yunfei Gu, Mircea R. Stan, Avik W. Ghosh:
Hardware based Spatio-Temporal Neural Processing Backend for Imaging Sensors: Towards a Smart Camera. CoRR abs/1803.08635 (2018) - [i4]Samiran Ganguly, Yunfei Gu, Yunkun Xie, Mircea R. Stan, Avik W. Ghosh, Nibir K. Dhar:
Reservoir Computing based Neural Image Filters. CoRR abs/1809.02651 (2018) - [i3]Samiran Ganguly, Kerem Yunus Çamsari, Avik W. Ghosh:
Analog Signal Processing Using Stochastic Magnets. CoRR abs/1812.08273 (2018) - 2017
- [i2]Samiran Ganguly, Kerem Yunus Çamsari, Avik W. Ghosh:
Reservoir Computing using Stochastic p-Bits. CoRR abs/1709.10211 (2017) - 2016
- [b1]Samiran Ganguly:
Spintronic device modeling and evaluation using modular approach to spintronics. Purdue University, USA, 2016 - [i1]Samiran Ganguly, Kerem Yunus Çamsari, Supriyo Datta:
Evaluating Spintronic Devices Using The Modular Approach. CoRR abs/1608.03681 (2016)
2000 – 2009
- 2007
- [c2]Deblina Sarkar, Samiran Ganguly, Deepanjan Datta, A. Ananda Prasad Sarab, Sudeb Dasgupta:
Modeling of Leakages in Nano-Scale DG MOSFET to Implement Low Power SRAM: A Device/Circuit Co-Design. VLSI Design 2007: 183-188 - 2006
- [c1]Deepanjan Datta, Samiran Ganguly:
Design of Multi-bit SET Adder and Its Fault Simulation. VLSI Design 2006: 549-552
Coauthor Index
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