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ORCIDDinos Moundanos
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2000 – 2009
- 2000
[c8]Jawahar Jain, K. Mohanram, Dinos Moundanos, Ingo Wegener, Yuan Lu:
Analysis of composition complexity and how to obtain smaller canonical graphs. DAC 2000: 681-686
1990 – 1999
- 1999
- [j2]Dinos Moundanos, Jacob A. Abraham:
On Design Validation Using Verification Technology. J. Electron. Test. 15(1-2): 173-189 (1999) - [c7]Dinos Moundanos, Jacob A. Abraham:
Formal Checking of Properties in Complex Systems Using Abstractions. Great Lakes Symposium on VLSI 1999: 280-283 - 1998
- [j1]Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Hoskote:
Abstraction Techniques for Validation Coverage Analysis and Test Generation. IEEE Trans. Computers 47(1): 2-14 (1998) - [c6]Dinos Moundanos, Jacob A. Abraham:
Using Verification Technology for Validation Coverage Analysis and Test Generation. VTS 1998: 254-259 - 1996
- [c5]Prakash Arunachalam, Craig M. Chase, Dinos Moundanos:
Distributed Binary Decision Diagrams for Verification of Large Circuit. ICCD 1996: 365-370 - [c4]Dinos Moundanos, Jacob A. Abraham, Yatin Vasant Hoskote:
A Unified Framework for Design Validation and Manufacturing Test. ITC 1996: 875-884 - 1995
- [c3]Yatin Vasant Hoskote, Dinos Moundanos, Jacob A. Abraham:
Automatic extraction of the control flow machine and application to evaluating coverage of verification vectors. ICCD 1995: 532-537 - [c2]Jawahar Jain, Dinos Moundanos, James R. Bitner, Jacob A. Abraham, Donald S. Fussell, Don E. Ross:
Efficient variable ordering and partial representation algorithm. VLSI Design 1995: 81-86 - 1994
- [c1]Jawahar Jain, James R. Bitner, Dinos Moundanos, Jacob A. Abraham, Donald S. Fussell:
A new scheme to compute variable orders for binary decision diagrams. Great Lakes Symposium on VLSI 1994: 105-108
Coauthor Index
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