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Richard D. Strong
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2010 – 2019
- 2015
- [c7]Henrique Rodrigues, Richard D. Strong, Alper Sinan Akyurek, Tajana Simunic Rosing:
Dynamic Optical Switching for Latency Sensitive Applications. ANCS 2015: 75-86 - [c6]Henrique Rodrigues, Richard D. Strong, Tajana Rosing:
Accurate emulation of fast optical circuit switches. ICC 2015: 5030-5035 - 2013
- [b1]Richard D. Strong:
Low-Latency Techniques for Improving System Energy Efficiency /. University of California, San Diego, USA, 2013 - [j3]Sheng Li, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, Norman P. Jouppi:
The McPAT Framework for Multicore and Manycore Architectures: Simultaneously Modeling Power, Area, and Timing. ACM Trans. Archit. Code Optim. 10(1): 5:1-5:29 (2013) - [j2]Andrew B. Kahng, Seokhyeong Kang, Tajana Simunic Rosing, Richard D. Strong:
Many-Core Token-Based Adaptive Power Gating. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(8): 1288-1292 (2013) - [c5]George Porter, Richard D. Strong, Nathan Farrington, Alex Forencich, Pang-Chen Sun, Tajana Rosing, Yeshaiahu Fainman, George Papen, Amin Vahdat:
Integrating microsecond circuit switching into the data center. SIGCOMM 2013: 447-458 - 2012
- [c4]Kwangok Jeong, Andrew B. Kahng, Seokhyeong Kang, Tajana Simunic Rosing, Richard D. Strong:
MAPG: Memory access power gating. DATE 2012: 1054-1059 - [c3]Andrew B. Kahng, Seokhyeong Kang, Tajana Rosing, Richard D. Strong:
TAP: token-based adaptive power gating. ISLPED 2012: 203-208
2000 – 2009
- 2009
- [j1]Richard D. Strong, Jayaram Mudigonda, Jeffrey C. Mogul, Nathan L. Binkert, Dean M. Tullsen:
Fast switching of threads between cores. ACM SIGOPS Oper. Syst. Rev. 43(2): 35-45 (2009) - [c2]Sheng Li, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, Norman P. Jouppi:
McPAT: an integrated power, area, and timing modeling framework for multicore and manycore architectures. MICRO 2009: 469-480 - [c1]Ayse K. Coskun, Richard D. Strong, Dean M. Tullsen, Tajana Simunic Rosing:
Evaluating the impact of job scheduling and power management on processor lifetime for chip multiprocessors. SIGMETRICS/Performance 2009: 169-180
Coauthor Index
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