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Hyuk Sun
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2020 – today
- 2020
- [j3]Hyuk Sun, Kazuki Sobue, Koichi Hamashita, Tejasvi Anand, Un-Ku Moon:
A 951-fsrms Period Jitter 3.2% Modulation Range in-Band Modulation Spread-Spectrum Clock Generator. IEEE J. Solid State Circuits 55(2): 426-438 (2020)
2010 – 2019
- 2018
- [j2]Hyuk Sun, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon:
An Oversampling Stochastic ADC Using VCO-Based Quantizers. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(12): 4037-4050 (2018) - 2017
- [c8]Spencer Leuenberger, Jason Muhlestein, Hyuk Sun, Praveen Kumar Venkatachala, Un-Ku Moon:
A 74.33 dB SNDR 20 MSPS 2.74 mW pipelined ADC using a dynamic deadzone ring amplifier. CICC 2017: 1-4 - [c7]Jason Muhlestein, Spencer Leuenberger, Hyuk Sun, Yang Xu, Un-Ku Moon:
A 73dB SNDR 20MS/s 1.28mW SAR-TDC using hybrid two-step quantization. CICC 2017: 1-4 - [c6]Hyuk Sun, Kazuki Sobue, Koichi Hamashita, Tejasvi Anand, Un-Ku Moon:
A 0.951 psrms period jitter, 3.2% modulation range, DSM-free, spread-spectrum PLL. CICC 2017: 1-4 - 2016
- [c5]Hyuk Sun, Jason Muhlestein, Spencer Leuenberger, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon:
A 50 MHz bandwidth 54.2 dB SNDR reference-free stochastic ADC using VCO-based quantizers. A-SSCC 2016: 325-328 - [c4]Hyuk Sun, Kazuki Sobue, Koichi Hamashita, Un-Ku Moon:
A power efficient PLL with in-loop-bandwidth spread-spectrum modulation scheme using a charge-based discrete-time loop filter. ISCAS 2016: 2755-2758 - 2015
- [c3]Hyuk Sun, Jason Muhlestein, Un-Ku Moon:
A VCO-based spatial averaging stochastic ADC. ICECS 2015: 272-275 - [c2]Hyuk Sun, Un-Ku Moon:
MDLL/PLL dual-path clock generator. MWSCAS 2015: 1-4 - [c1]Yang Xu, Hyuk Sun, Un-Ku Moon:
Analysis of discrete-time charge-domain complex bandpass filter with accurately tunable center frequency. MWSCAS 2015: 1-4 - 2014
- [j1]Shiuh-Hua Wood Chiang, Hyuk Sun, Behzad Razavi:
A 10-Bit 800-MHz 19-mW CMOS ADC. IEEE J. Solid State Circuits 49(4): 935-949 (2014)
Coauthor Index
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