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Prashant J. Nair
Person information
- affiliation: University of British Columbia (UBC), Systems and Architectures (STAR) Lab, Vancouver, BC, Canada
- affiliation: Quantum Algorithms Institute (QAI), Surrey, BC, Canada
- affiliation (PhD 2017): Georgia Institute of Technology, Atlanta, GA, USA
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2020 – today
- 2024
- [c35]Meng Wang, Bo Fang, Ang Li, Prashant J. Nair:
Red-QAOA: Efficient Variational Optimization through Circuit Reduction. ASPLOS (2) 2024: 980-998 - [c34]Bo Fang, Xinyi Li, Harvey Dam, Cheng Tan, Siva Kumar Sastry Hari, Timothy Tsai, Ignacio Laguna, Dingwen Tao, Ganesh Gopalakrishnan, Prashant J. Nair, Kevin J. Barker, Ang Li:
Understanding Mixed Precision GEMM with MPGemmFI: Insights into Fault Resilience. CLUSTER 2024: 166-178 - [c33]Muhammad Adnan, Yassaman Ebrahimzadeh Maboud, Divya Mahajan, Prashant J. Nair:
Heterogeneous Acceleration Pipeline for Recommendation System Training. ISCA 2024: 1063-1079 - [c32]Muhammad Adnan, Akhil Arunkumar, Gaurav Jain, Prashant J. Nair, Ilya Soloveychik, Purushotham Kamath:
Keyformer: KV Cache reduction through key tokens selection for Efficient Generative Inference. MLSys 2024 - [i14]Muhammad Adnan, Akhil Arunkumar, Gaurav Jain, Prashant J. Nair, Ilya Soloveychik, Purushotham Kamath:
Keyformer: KV Cache Reduction through Key Tokens Selection for Efficient Generative Inference. CoRR abs/2403.09054 (2024) - [i13]Yassaman Ebrahimzadeh Maboud, Muhammad Adnan, Divya Mahajan, Prashant J. Nair:
Accelerating Recommender Model Training by Dynamically Skipping Stale Embeddings. CoRR abs/2404.04270 (2024) - [i12]Muhammad Adnan, Amar Phanishayee, Janardhan Kulkarni, Prashant J. Nair, Divya Mahajan:
Workload-Aware Hardware Accelerator Mining for Distributed Deep Learning Training. CoRR abs/2404.14632 (2024) - 2023
- [c31]Gwangeun Byeon, Seungtae Lee, Seongwook Kim, Yongjun Kim, Prashant J. Nair, Seokin Hong:
SparseFT: Sparsity-aware Fault Tolerance for Reliable CNN Inference on GPUs. PACT 2023: 337-338 - [c30]Dingqing Yang, Prashant J. Nair, Mieszko Lis:
HuffDuff: Stealing Pruned DNNs from Sparse Accelerators. ASPLOS (2) 2023: 385-399 - [c29]Jeonghyun Woo, Gururaj Saileshwar, Prashant J. Nair:
Scalable and Secure Row-Swap: Efficient and Safe Row Hammer Mitigation in Memory Systems. HPCA 2023: 374-389 - [c28]Irene Wang, Prashant J. Nair, Divya Mahajan:
FLuID: Mitigating Stragglers in Federated Learning using Invariant Dropout. NeurIPS 2023 - [c27]Ali Asgari Khoshouyeh, Florian Geissler, Syed Sha Qutub, Michael Paulitsch, Prashant J. Nair, Karthik Pattabiraman:
Structural Coding: A Low-Cost Scheme to Protect CNNs from Large-Granularity Memory Faults. SC 2023: 85:1-85:17 - [c26]Meng Wang, Fei Hua, Chenxu Liu, Nicholas P. Bauman, Karol Kowalski, Daniel Claudino, Travis S. Humble, Prashant J. Nair, Ang Li:
Enabling Scalable VQE Simulation on Leading HPC Systems. SC Workshops 2023: 1460-1467 - [i11]Irene Wang, Prashant J. Nair, Divya Mahajan:
FLuID: Mitigating Stragglers in Federated Learning using Invariant Dropout. CoRR abs/2307.02623 (2023) - [i10]Muhammad Adnan, Yassaman Ebrahimzadeh Maboud, Divya Mahajan, Prashant J. Nair:
Ad-Rec: Advanced Feature Interactions to Address Covariate-Shifts in Recommendation Networks. CoRR abs/2308.14902 (2023) - [i9]Bo Fang, Xinyi Li, Harvey Dam, Cheng Tan, Siva Kumar Sastry Hari, Timothy Tsai, Ignacio Laguna, Dingwen Tao, Ganesh Gopalakrishnan, Prashant J. Nair, Kevin J. Barker, Ang Li:
MPGemmFI: A Fault Injection Technique for Mixed Precision GEMM in ML Applications. CoRR abs/2311.05782 (2023) - 2022
- [c25]Gururaj Saileshwar, Bolin Wang, Moinuddin K. Qureshi, Prashant J. Nair:
Randomized row-swap: mitigating Row Hammer by breaking spatial correlation between aggressor and victim rows. ASPLOS 2022: 1056-1069 - [c24]Ali Fakhrzadehgan, Yale N. Patt, Prashant J. Nair, Moinuddin K. Qureshi:
SafeGuard: Reducing the Security Risk from Row-Hammer via Low-Cost Integrity Protection. HPCA 2022: 373-386 - [c23]Moinuddin K. Qureshi, Aditya Rohan, Gururaj Saileshwar, Prashant J. Nair:
Hydra: enabling low-overhead mitigation of row-hammer at ultra-low thresholds via hybrid tracking. ISCA 2022: 699-710 - [c22]Anish Saxena, Gururaj Saileshwar, Prashant J. Nair, Moinuddin K. Qureshi:
AQUA: Scalable Rowhammer Mitigation by Quarantining Aggressor Rows at Runtime. MICRO 2022: 108-123 - [i8]Meng Wang, Rui Huang, Swamit S. Tannu, Prashant J. Nair:
TQSim: A Case for Reuse-Focused Tree-Based Quantum Circuit Simulation. CoRR abs/2203.13892 (2022) - [i7]Muhammad Adnan, Yassaman Ebrahimzadeh Maboud, Divya Mahajan, Prashant J. Nair:
Heterogeneous Acceleration Pipeline for Recommendation System Training. CoRR abs/2204.05436 (2022) - [i6]Swamit S. Tannu, Prashant J. Nair:
The Dirty Secret of SSDs: Embodied Carbon. CoRR abs/2207.10793 (2022) - [i5]Jeonghyun Woo, Gururaj Saileshwar, Prashant J. Nair:
Scalable and Secure Row-Swap: Efficient and Safe Row Hammer Mitigation in Memory Systems. CoRR abs/2212.12613 (2022) - 2021
- [j5]Muhammad Adnan, Yassaman Ebrahimzadeh Maboud, Divya Mahajan, Prashant J. Nair:
Accelerating Recommendation System Training by Leveraging Popular Choices. Proc. VLDB Endow. 15(1): 127-140 (2021) - [c21]Avilash Mukherjee, Kumar Saurav, Prashant J. Nair, Sudip Shekhar, Mieszko Lis:
A Case for Emerging Memories in DNN Accelerators. DATE 2021: 938-941 - [i4]Muhammad Adnan, Yassaman Ebrahimzadeh Maboud, Divya Mahajan, Prashant J. Nair:
High-Performance Training by Exploiting Hot-Embeddings in Recommendation Systems. CoRR abs/2103.00686 (2021) - 2020
- [c20]Amin Ghasemazar, Prashant J. Nair, Mieszko Lis:
Thesaurus: Efficient Cache Compression via Dynamic Clustering. ASPLOS 2020: 527-540 - [c19]Amin Ghasemazar, Mohammad Ewais, Prashant J. Nair, Mieszko Lis:
2DCC: Cache Compression in Two Dimensions. DATE 2020: 756-761 - [c18]Beomjun Kim, Prashant J. Nair, Seokin Hong:
ADAM: Adaptive Block Placement with Metadata Embedding for Hybrid Caches. ICCD 2020: 421-424
2010 – 2019
- 2019
- [c17]Prashant J. Nair, Bahar Asgari, Moinuddin K. Qureshi:
SuDoku: Tolerating High-Rate of Transient Failures for Enabling Scalable STTRAM. DSN 2019: 388-400 - [c16]Poulami Das, Swamit S. Tannu, Prashant J. Nair, Moinuddin K. Qureshi:
A Case for Multi-Programming Quantum Computers. MICRO 2019: 291-303 - [c15]Seokin Hong, Bülent Abali, Alper Buyuktosunoglu, Michael B. Healy, Prashant J. Nair:
Touché: Towards Ideal and Efficient Cache Compression By Mitigating Tag Area Overheads. MICRO 2019: 453-465 - [i3]Seokin Hong, Bülent Abali, Alper Buyuktosunoglu, Michael B. Healy, Prashant J. Nair:
Touché: Towards Ideal and Efficient Cache Compression By Mitigating Tag Area Overheads. CoRR abs/1909.00553 (2019) - 2018
- [c14]Gururaj Saileshwar, Prashant J. Nair, Prakash Ramrakhyani, Wendy Elsasser, Moinuddin K. Qureshi:
SYNERGY: Rethinking Secure-Memory Design for Error-Correcting Memories. HPCA 2018: 454-465 - [c13]Seokin Hong, Prashant Jayaprakash Nair, Bülent Abali, Alper Buyuktosunoglu, Kyu-Hyoun Kim, Michael B. Healy:
Attaché: Towards Ideal Memory Compression by Mitigating Metadata Bandwidth Overheads. MICRO 2018: 326-338 - [c12]Gururaj Saileshwar, Prashant J. Nair, Prakash Ramrakhyani, Wendy Elsasser, José A. Joao, Moinuddin K. Qureshi:
Morphable Counters: Enabling Compact Integrity Trees For Low-Overhead Secure Memories. MICRO 2018: 416-427 - [i2]Kevin K. Chang, Prashant J. Nair, Saugata Ghose, Donghyuk Lee, Moinuddin K. Qureshi, Onur Mutlu:
LISA: Increasing Internal Connectivity in DRAM for Fast Data Movement and Low Latency. CoRR abs/1805.03184 (2018) - 2017
- [b1]Prashant J. Nair:
Architectural techniques to enable reliable and scalable memory systems. Georgia Institute of Technology, Atlanta, GA, USA, 2017 - [c11]Vinson Young, Prashant J. Nair, Moinuddin K. Qureshi:
DICE: Compressing DRAM Caches for Bandwidth and Capacity. ISCA 2017: 627-638 - [c10]Swamit S. Tannu, Zachary A. Myers, Prashant J. Nair, Douglas M. Carmean, Moinuddin K. Qureshi:
Taming the instruction bandwidth of quantum computers via hardware-managed error correction. MICRO 2017: 679-691 - [i1]Prashant J. Nair:
Architectural Techniques to Enable Reliable and Scalable Memory Systems. CoRR abs/1704.03991 (2017) - 2016
- [j4]Prashant J. Nair, David A. Roberts, Moinuddin K. Qureshi:
FaultSim: A Fast, Configurable Memory-Reliability Simulator for Conventional and 3D-Stacked Systems. ACM Trans. Archit. Code Optim. 12(4): 44:1-44:24 (2016) - [j3]Prashant J. Nair, David A. Roberts, Moinuddin K. Qureshi:
Citadel: Efficiently Protecting Stacked Memory from TSV and Large Granularity Failures. ACM Trans. Archit. Code Optim. 12(4): 49:1-49:24 (2016) - [c9]Kevin K. Chang, Prashant J. Nair, Donghyuk Lee, Saugata Ghose, Moinuddin K. Qureshi, Onur Mutlu:
Low-Cost Inter-Linked Subarrays (LISA): Enabling fast inter-subarray data movement in DRAM. HPCA 2016: 568-580 - [c8]Prashant J. Nair, Vilas Sridharan, Moinuddin K. Qureshi:
XED: Exposing On-Die Error Detection Information for Strong Memory Reliability. ISCA 2016: 341-353 - 2015
- [j2]Dae-Hyun Kim, Prashant J. Nair, Moinuddin K. Qureshi:
Architectural Support for Mitigating Row Hammering in DRAM Memories. IEEE Comput. Archit. Lett. 14(1): 9-12 (2015) - [c7]Vinson Young, Prashant J. Nair, Moinuddin K. Qureshi:
DEUCE: Write-Efficient Encryption for Non-Volatile Memories. ASPLOS 2015: 33-44 - [c6]Chia-Chen Chou, Prashant J. Nair, Moinuddin K. Qureshi:
Reducing Refresh Power in Mobile Devices with Morphable ECC. DSN 2015: 355-366 - [c5]Moinuddin K. Qureshi, Dae-Hyun Kim, Samira Manabi Khan, Prashant J. Nair, Onur Mutlu:
AVATAR: A Variable-Retention-Time (VRT) Aware Refresh for DRAM Systems. DSN 2015: 427-437 - [c4]Prashant J. Nair, Chia-Chen Chou, Bipin Rajendran, Moinuddin K. Qureshi:
Reducing read latency of phase change memory via early read and Turbo Read. HPCA 2015: 309-319 - 2014
- [j1]Prashant J. Nair, Chia-Chen Chou, Moinuddin K. Qureshi:
Refresh pausing in DRAM memory systems. ACM Trans. Archit. Code Optim. 11(1): 10:1-10:26 (2014) - [c3]Prashant J. Nair, David A. Roberts, Moinuddin K. Qureshi:
Citadel: Efficiently Protecting Stacked Memory from Large Granularity Failures. MICRO 2014: 51-62 - 2013
- [c2]Prashant J. Nair, Chia-Chen Chou, Moinuddin K. Qureshi:
A case for Refresh Pausing in DRAM memory systems. HPCA 2013: 627-638 - [c1]Prashant J. Nair, Dae-Hyun Kim, Moinuddin K. Qureshi:
ArchShield: architectural framework for assisting DRAM scaling by tolerating high error rates. ISCA 2013: 72-83
Coauthor Index
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last updated on 2024-11-20 20:58 CET by the dblp team
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