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ORCIDDuvindu Piyasena
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2020 – today
- 2024
[c7]Miyuru Thathsara, Siew-Kei Lam, Damith Kawshan, Duvindu Piyasena:
Hardware Accelerator for Feature Matching with Binary Search Tree. ISCAS 2024: 1-5- 2021
- [c6]Duvindu Piyasena, Siew-Kei Lam, Meiqing Wu:
Edge Accelerator for Lifelong Deep Learning using Streaming Linear Discriminant Analysis. FCCM 2021: 259 - [c5]Duvindu Piyasena, Siew-Kei Lam, Meiqing Wu:
Accelerating Continual Learning on Edge FPGA. FPL 2021: 294-300 - 2020
- [j1]Heechul Bae, Eoin Brophy, Rosa H. M. Chan, Baoquan Chen, Fan Feng
, Gabriele Graffieti, Vidit Goel, Xinyue Hao, Hyonyoung Han, Sathursan Kanagarajah, Somesh Kumar, Siew-Kei Lam, Tin Lun Lam, Chuanlin Lan, Qi Liu, Vincenzo Lomonaco, Liang Ma, Davide Maltoni, German Ignacio Parisi, Lorenzo Pellegrini, Duvindu Piyasena, Shiliang Pu, Qi She, Debdoot Sheet, Soonyong Song, Youngsung Son, Zhengwei Wang, Tomas E. Ward, Jianwen Wu, Meiqing Wu, Di Xie, Yangsheng Xu, Lin Yang, Qihan Yang, Qiaoyong Zhong, Liguang Zhou:
IROS 2019 Lifelong Robotic Vision: Object Recognition Challenge [Competitions]. IEEE Robotics Autom. Mag. 27(2): 11-16 (2020) - [c4]Duvindu Piyasena, Miyuru Thathsara, Sathursan Kanagarajah, Siew Kei Lam, Meiqing Wu:
Dynamically Growing Neural Network Architecture for Lifelong Deep Learning on the Edge. FPL 2020: 262-268 - [i1]Qi She, Fan Feng, Qi Liu, Rosa H. M. Chan, Xinyue Hao, Chuanlin Lan, Qihan Yang, Vincenzo Lomonaco, German Ignacio Parisi, Heechul Bae, Eoin Brophy, Baoquan Chen, Gabriele Graffieti, Vidit Goel, Hyonyoung Han, Sathursan Kanagarajah, Somesh Kumar, Siew-Kei Lam, Tin Lun Lam, Liang Ma, Davide Maltoni, Lorenzo Pellegrini, Duvindu Piyasena, Shiliang Pu, Debdoot Sheet, Soonyong Song, Youngsung Son, Zhengwei Wang, Tomas E. Ward, Jianwen Wu, Meiqing Wu, Di Xie, Yangsheng Xu, Lin Yang, Qiaoyong Zhong, Liguang Zhou:
IROS 2019 Lifelong Robotic Vision Challenge - Lifelong Object Recognition Report. CoRR abs/2004.14774 (2020)
2010 – 2019
- 2019
- [c3]Duvindu Piyasena, Rukshan Wickramasinghe, Debdeep Paul, Siew-Kei Lam, Meiqing Wu:
Reducing Dynamic Power in Streaming CNN Hardware Accelerators by Exploiting Computational Redundancies. FPL 2019: 354-359 - [c2]Duvindu Piyasena, Rukshan Wickramasinghe, Debdeep Paul, Siew-Kei Lam, Meiqing Wu:
Lowering Dynamic Power of a Stream-based CNN Hardware Accelerator. MMSP 2019: 1-6 - 2018
- [c1]Dakila Serasinghe, Duvindu Piyasena, Ajith Pasqual:
A Novel Low-Complexity VLSI Architecture for an EEG Feature Extraction Platform. DSD 2018: 472-478
Coauthor Index
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