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ORCIDEiji Yoshida
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2020 – today
- 2023
[c15]Satoshi Imamura
, Akihiko Kasagi, Eiji Yoshida:
Offline Quantum Circuit Pruning for Quantum Chemical Calculations. QCE 2023: 349-355- 2022
- [j5]Ryan Nathanael Soenjoto Widodo, Hiroki Ohtsuji, Erika Hayashi, Eiji Yoshida, Hirotake Abe, Kazuhiko Kato:
NVKVS: Non-Volatile Memory Optimized Key-Value Separated LSM-Tree. J. Inf. Process. 30: 332-342 (2022) - 2021
- [c14]Reika Kinoshita, Satoshi Imamura, Lukas Vogel, Satoshi Kazama, Eiji Yoshida:
Cost-Performance Evaluation of Heterogeneous Tierless Storage Management in a Public Cloud. CANDAR 2021: 121-126 - 2020
- [j4]Arata Endo, Hiroki Ohtsuji, Erika Hayashi, Eiji Yoshida, Chunghan Lee, Susumu Date, Shinji Shimojo:
Dynamic Traffic Control of Staging Traffic on the Interconnect of the HPC Cluster System. IEEE Access 8: 198518-198531 (2020) - [c13]Masafumi Katoh, Tomonori Kubota, Eiji Yoshida, Yuji Kojima, Yuuichi Yamagishi:
Proposal of Profile and Event Sharing by Agent Communication. ICIN 2020: 178-185 - [c12]Satoshi Imamura, Eiji Yoshida:
FairHym: Improving Inter-Process Fairness on Hybrid Memory Systems. NVMSA 2020: 1-6
2010 – 2019
- 2019
- [j3]Satoshi Imamura, Eiji Yoshida, Kazuichi Oe:
Reducing CPU Power Consumption with Device Utilization-Aware DVFS for Low-Latency SSDs. IEICE Trans. Inf. Syst. 102-D(9): 1740-1749 (2019) - [c11]Satoshi Imamura, Eiji Yoshida:
POSTER: AR-MMAP: Write Performance Improvement of Memory-Mapped File. PACT 2019: 493-494 - 2018
- [c10]Satoshi Imamura, Eiji Yoshida:
Reducing CPU Power Consumption for Low-Latency SSDs. NVMSA 2018: 79-84 - [c9]Eiji Yoshida, S. Kazama, S. Kuwamura, S. Gokita, T. Miyoshi, Y. Noguchi, Y. Honda:
Memory Expansion Technology for Large-Scale Data Processing Using Software-Controlled SSD. VLSI Circuits 2018: 59-60 - 2014
- [j2]Kazuaki Oishi, Eiji Yoshida, Yasufumi Sakai, Hideki Takauchi, Yoichi Kawano, Noriaki Shirai, Hideki Kano, Masahiro Kudo, Tomotoshi Murakami, Tetsuro Tamura, Shigeaki Kawai, Kazuo Suto, Hiroshi Yamazaki, Toshihiko Mori:
A 1.95 GHz Fully Integrated Envelope Elimination and Restoration CMOS Power Amplifier Using Timing Alignment Technique for WCDMA and LTE. IEEE J. Solid State Circuits 49(12): 2915-2924 (2014) - [c8]Yu Kurata, Yasuaki Hashizume, Shinichi Aozasa, Mikitaka Itoh, Toshikazu Hashimoto, Hiromasa Tanobe, Yasuhiko Nakanishi, Eiji Yoshida, Hiroyuki Fukuyama, Hiroshi Yamazaki, Takashi Goh, Haruki Yokoyama, Yoshifumi Muramoto:
400-G coherent receiver using silica-based heterogeneously-integrated PLC with newly developed waveplate type PBS. ECOC 2014: 1-3 - [c7]Takayoshi Yamashita, Masayuki Tanaka, Eiji Yoshida, Yuji Yamauchi, Hironobu Fujiyoshi:
To Be Bernoulli or to Be Gaussian, for a Restricted Boltzmann Machine. ICPR 2014: 1520-1525 - [c6]Kazuaki Oishi, Eiji Yoshida, Yasufumi Sakai, Hideki Takauchi, Yoichi Kawano, Noriaki Shirai, Hideki Kano, Masahiro Kudo, Tomotoshi Murakami, Tetsuro Tamura, Seitaro Kawai, Shinji Yamaura, Kazuo Suto, Hiroshi Yamazaki, Toshihiko Mori:
3.2 A 1.95GHz fully integrated envelope elimination and restoration CMOS power amplifier with envelope/phase generator and timing aligner for WCDMA and LTE. ISSCC 2014: 60-61 - 2013
- [c5]Yoshiyuki Doi, Manabu Oguma, Masayuki Ito, Ikuo Ogawa, Toshihide Yoshimatsu, Tetsuichiro Ohno, Eiji Yoshida, Hiroshi Takahashi:
Compact ROSA for 100-Gb/s (4 × 25 Gb/s) Ethernet with a PLC-based AWG demultiplexer. OFC/NFOEC 2013: 1-3 - 2011
- [j1]Akihide Sano, Takayuki Kobayashi, Eiji Yoshida, Yutaka Miyamoto:
Ultra-High Capacity Optical Transmission Technologies for 100 Tbit/s Optical Transport Networks. IEICE Trans. Commun. 94-B(2): 400-408 (2011)
2000 – 2009
- 2008
- [c4]Eiji Yoshida, Seiichi Mita:
Invariant Codes for Similar Transformation and its Application to Shape Matching. VISAPP (2) 2008: 264-269 - 2001
- [c3]Takashi Sato, Eiji Yoshida, Yasunori Kakebayashi, Joji Asakura, Norihisa Komoda:
Application of IEC61131-3 for semiconductor processing equipment. ETFA (2) 2001: 47-50 - [c2]Junichi Toyouchi, Motohisa Funabashi, Linda Strick, Marc Born, Atsushi Kanai, Tomotaka Uchihashi, Satoshi Hakomori, Eiji Yoshida, Norihisa Komoda:
Development of Service Integration Platform for One-Stop Service Applications. WECWIS 2001: 123-127
1990 – 1999
- 1999
- [c1]Moritoshi Yasunaga, Eiji Yoshida, Ikuo Yoshihara:
Parallel back-propagation using genetic algorithm: real-time BP learning on the massively parallel computer CP-PACS. IJCNN 1999: 4175-4180
Coauthor Index
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