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2020 – today
- 2024
[c3]Shuxin Yang, Chenchen Ding, Mingqiang Huang, Kai Li, Chenghao Li, Zikun Wei, Sixiao Huang, Jingyao Dong, Liuyang Zhang, Hao Yu:
LAMPS: A Layer-wised Mixed-Precision-and-Sparsity Accelerator for NAS-Optimized CNNs on FPGA. FCCM 2024: 90-96- 2023
- [j2]Mingqiang Huang
, Junyi Luo, Chenchen Ding, Zikun Wei, Sixiao Huang, Hao Yu:
An Integer-Only and Group-Vector Systolic Accelerator for Efficiently Mapping Vision Transformer on Edge. IEEE Trans. Circuits Syst. I Regul. Pap. 70(12): 5289-5301 (2023) - [c2]Mingqiang Huang, Yucen Liu, Sixiao Huang, Kai Li, Qiuping Wu, Hao Yu:
Multi-bit-width CNN Accelerator with Systolic-in-Systolic Dataflow and Single DSP Multiple Multiplication Scheme. FPGA 2023: 229 - 2022
- [j1]Kai Li, Wei Mao, Junzhuo Zhou, Boyu Li, Zhengke Yang, Shuxing Yang, Laimin Du, Sixiao Huang, Hao Yu:
A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 4123-4127 (2022) - [c1]Kai Li, Junzhuo Zhou, Boyu Li, Shuxing Yang, Sixiao Huang, Shaobo Luo, Wei Mao, Hao Yu:
A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing. AICAS 2022: 226-229
Coauthor Index
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