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2020 – today
- 2023
[j4]Senri Yoshikawa, Shuji Sannomiya, Makoto Iwata, Akira Sato, Hiroaki Nishikawa:
EDA-oriented FPGA Circuit Design Method for Four-phase Bundled-data Circular Self-timed Pipeline. J. Inf. Process. 31: 495-508 (2023)- [c18]Kazunori Fujiwara, Shuji Sannomiya, Akira Sato, Kenichi Yoshida:
Latency analysis of JP and Root DNS servers from packet capture data. COMPSAC 2023: 526-531 - 2022
- [c17]Akira Sato, Kazunori Fujiwara, Kenichi Yoshida, Shuji Sannomiya:
Benefit of third-party name server operations in DNS configuration. COMPSAC 2022: 1032-1037 - 2020
- [j3]Kenichi Yoshida, Kazunori Fujiwara, Akira Sato, Shuji Sannomiya:
Spread of IP Anycast and GSLB. J. Inf. Process. 28: 562-569 (2020) - [c16]Kenichi Yoshida, Kazunori Fujiwara, Akira Sato, Shuji Sannomiya:
Cardinality Analysis to Classify Malicious Domain Names. COMPSAC 2020: 826-832 - [c15]Kenichi Yoshida, Kazunori Fujiwara, Akira Sato, Shuji Sannomiya:
Automatic Generation and Classification of Malicious FQDN. PKAW 2020: 120-129 - [c14]Kenichi Yoshida, Akira Sato, Shuji Sannomiya:
Contact analysis on COVID-19 using a campus network: poster abstract. SenSys 2020: 752-753
2010 – 2019
- 2019
- [c13]Kenichi Yoshida, Kazunori Fujiwara, Akira Sato, Shuji Sannomiya:
Spread of Anycast and GSLB. COMPSAC (2) 2019: 30-35 - 2018
- [j2]Shuji Sannomiya, Akira Sato, Kenichi Yoshida, Hiroaki Nishikawa:
Abnormal Traffic Detection Circuit with Real-time Cardinality Counter. J. Inf. Process. 26: 590-600 (2018) - 2017
- [c12]Shuji Sannomiya, Akira Sato, Kenichi Yoshida, Hiroaki Nishikawa:
Cardinality Counting Circuit for Real-Time Abnormal Traffic Detection. COMPSAC (1) 2017: 505-510 - 2010
- [c11]Naoya Kagawa, Shuji Sannomiya, Makoto Iwata:
Macroscopic Power Simulation for Self-Timed Pipeline. PDPTA 2010: 589-595 - [c10]Shuji Sannomiya, Kei Miyagi, Makoto Iwata, Hiroaki Nishikawa:
Stage-by-Stage Power Gating Circuit for Ultra-Low-Power Self-Timed Pipeline. PDPTA 2010: 596-602
2000 – 2009
- 2009
- [j1]Kazuhiro Komatsu, Shuji Sannomiya, Makoto Iwata
, Hiroaki Terada, Suguru Kameda, Kazuo Tsubouchi:
Interacting Self-Timed Pipelines and Elementary Coupling Control Modules. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(7): 1642-1651 (2009) - [c9]Shuji Sannomiya, Kei Miyagi, Keiichi Sakai, Makoto Iwata, Hiroaki Nishikawa:
Self-Timed Power Gating for Ultra-Low-Power Pipeline Circuit. PDPTA 2009: 575-580 - [c8]Makoto Iwata, Yuki Tamura, Masaaki Hashida, Shuji Sannomiya:
An Application of ULP-DDNS: Smart Pervasive Daily Healthcare System. PDPTA 2009: 622-627 - [c7]Yuki Tamura, Masaaki Hashida, Shuji Sannomiya, Makoto Iwata:
Smart pervasive healthcare-assistance in daily life. PervasiveHealth 2009: 1-6 - 2008
- [c6]Yuki Tamura, Masaaki Hashida, Shuji Sannomiya, Makoto Iwata:
Surrounding Healthcare Environment on Ad Hoc Network. PDPTA 2008: 687-693 - [c5]Kei Miyagi, Shuji Sannomiya, Keiichi Sakai, Makoto Iwata, Hiroaki Nishikawa:
Autonomous Power-Supply Control for Ultra-Low-Power Self-Timed Pipeline. PDPTA 2008: 704-709 - [c4]Shuji Sannomiya, Naoya Kagawa, Keiichi Sakai, Makoto Iwata:
A Data-Driven On-Chip Simulation Module and Its FPGA Implementation. PDPTA 2008: 710-716 - 2007
- [c3]Shuji Sannomiya, Kazuhiro Komatsu, Makoto Iwata:
A Self-Timed Pipeline Circuit for Low-Power Surrounding LSI Chips. PDPTA 2007: 613-622 - [c2]Makoto Iwata, Hiroshi Shima, Shuji Sannomiya, Hiroaki Nishikawa:
Self-Timed Stream Processor for Surrounding Computing Environment. PDPTA 2007: 655-662 - 2003
- [c1]Shuji Sannomiya, Yoichi Omori, Makoto Iwata:
A Macroscopic Behavior Model for Self-Timed Pipeline Systems. PADS 2003: 133-142
Coauthor Index
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