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2020 – today
- 2022
[c14]Koichiro Zaitsu, Akira Matsumoto, Mizuki Nishida, Yusuke Tanaka, Hirofumi Yamashita, Yosuke Satake, Takashi Watanabe, Kunihiko Araki, Naoki Nei, Keiichi Nakazawa, Junpei Yamamoto, Mutsuo Uehara, Hiroyuki Kawashima, Yusaku Kobayashi, Tomoyuki Hirano, Keiji Tatani:
A 2-Layer Transistor Pixel Stacked CMOS Image Sensor with Oxide-Based Full Trench Isolation for Large Full Well Capacity and High Quantum Efficiency. VLSI Technology and Circuits 2022: 286-287- 2021
- [c13]Oichi Kumagai, Junichi Ohmachi, Masao Matsumura, Shinichiro Yagi, Kenichi Tayu, Keitaro Amagawa, Tomohiro Matsukawa, Osamu Ozawa, Daisuke Hirono, Yasuhiro Shinozuka, Ryutaro Homma, Kumiko Mahara, Toshio Ohyama, Yousuke Morita, Shohei Shimada, Takahisa Ueno, Akira Matsumoto, Yusuke Otake, Toshifumi Wakano, Takashi Izawa:
A 189x600 Back-Illuminated Stacked SPAD Direct Time-of-Flight Depth Sensor for Automotive LiDAR Systems. ISSCC 2021: 110-112 - 2020
- [j8]Yuki Furubayashi
, Takashi Oshima, Taizo Yamawaki, Keiki Watanabe, Keijiro Mori, Naoki Mori, Akira Matsumoto, Yudai Kamada, Atsushi Isobe, Tomonori Sekiguchi:
A 22-ng/ $\surd$ Hz 17-mW Capacitive MEMS Accelerometer With Electrically Separated Mass Structure and Digital Noise- Reduction Techniques. IEEE J. Solid State Circuits 55(9): 2539-2552 (2020)
2010 – 2019
- 2019
- [j7]Akira Matsumoto, Satoshi Abe, Takefumi Hiraki, Shogo Fukushima, Takeshi Naemura:
Imperceptible AR Markers for Near-Screen Mobile Interaction. IEEE Access 7: 79927-79933 (2019) - [c12]Akira Matsumoto, Tomoyuki Yokogawa, Sousuke Amasaki, Hirohisa Aman, Kazutami Arimoto:
Consistency Verification of UML Sequence Diagrams Modeling Wireless Sensor Networks. IIAI-AAI 2019: 458-461 - [c11]Yuki Furubayashi, Takashi Oshima, Taizo Yamawaki, Keiki Watanabe, Keijiro Mori, Naoki Mori, Akira Matsumoto, Hideto Kazama, Yudai Kamada, Atsushi Isobe, Tomonori Sekiguchi:
A 22ng/√Hz 17mW MEMS Accelerometer with Digital Noise-Reduction Techniques. ISSCC 2019: 182-184 - 2015
- [c10]Miyuki Tabata, Tatsuro Goda, Akira Matsumoto, Yuji Miyahara:
Electrochemical label-free degranulation monitoring for in-situ evaluation of cellular function. EMBC 2015: 3177-3180 - 2013
- [j6]Akira Arutaki, Hiroshi Sakai, Akira Matsumoto:
Structured design concept for cross-layered protocols; applying to near field communication (NFC). Int. J. Space Based Situated Comput. 3(2): 113-124 (2013) - [j5]Tatsuro Goda, Ankit Balram Singi, Yasuhiro Maeda, Akira Matsumoto, Masaki Torimura, Hiroshi Aoki, Yuji Miyahara:
Label-Free Potentiometry for Detecting DNA Hybridization Using Peptide Nucleic Acid and DNA Probes. Sensors 13(2): 2267-2278 (2013) - 2012
- [j4]Seiya Abe, Sihun Yang, Masahito Shoyama, Tamotsu Ninomiya, Akira Matsumoto, Akiyoshi Fukui:
Malfunction Issue of SiC-SIT Based DC Circuit Breaker in 400 V DC Power Distribution Systems for Data Centers. IEICE Trans. Commun. 95-B(6): 1990-1996 (2012) - 2011
- [j3]Brooke Beier, Katherine Musick, Akira Matsumoto, Alyssa Panitch, Eric A. Nauman, Pedro P. Irazoqui:
Toward a Continuous Intravascular Glucose Monitoring System. Sensors 11(1): 409-424 (2011) - [c9]Peng Shao, Akira Matsumoto, Stefan Aust, Tetsuya Ito, Peter Davis:
A collision detection method based on power sensing and time-domain signal processing for wireless LAN. ISCIT 2011: 199-204
2000 – 2009
- 2009
- [c8]Akira Matsumoto, Kouichi Yoshimura, Stefan Aust, Tetsuya Ito, Yoshihisa Kondo:
Performance evaluation of IEEE 802.11n devices for vehicular networks. LCN 2009: 669-670 - 2004
- [c7]Atsuyuki Morishima, Hiroyuki Kitagawa, Akira Matsumoto:
A Machine Learning Approach to Rapid Development of XML Mapping Queries. ICDE 2004: 276-287 - 2001
- [c6]Kentaro Tsudaka, Masanobu Kawahara, Akira Matsumoto, Hiromi Okada:
Power control routing for multi hop wireless ad-hoc network. GLOBECOM 2001: 2819-2824
1990 – 1999
- 1991
- [j2]Akira Matsumoto:
Locally Parallel Cache Design Based on KL1 Memory Access Characteristics. New Gener. Comput. 9(2): 149-170 (1991) - 1990
- [c5]Kenji Nishida, Yasunori Kimura, Akira Matsumoto, Atsuhiro Goto:
Evaluation of MRB Garbage Collection on Parallel Logic Programming Architectures. ICLP 1990: 83-95
1980 – 1989
- 1989
- [c4]Atsuhiro Goto, Akira Matsumoto, Evan Tick:
Design and Performance of a Coherent Cache for Parallel Logic Programming Architectures. ISCA 1989: 25-33 - 1988
- [c3]Atsuhiro Goto, Masatoshi Sato, Katsuto Nakajima, Kazuo Taki, Akira Matsumoto:
Overview of the Parallel Inference Machine Architecture (PIM). FGCS 1988: 208-229 - 1987
- [c2]Masatoshi Sato, Hajime Shimizu, Akira Matsumoto, Kazuaki Rokusawa, Atsuhiro Goto:
KL1 Execution Model for PIM Cluster with Shared Memory. ICLP 1987: 338-355 - 1985
- [j1]Rikio Onai, Moritoshi Aso, Hajime Shimizu, Kanae Masuda, Akira Matsumoto:
Architecture of a Reduction-Based Parallel Inference Machine: PIM-R. New Gener. Comput. 3(2): 197-228 (1985) - [c1]Rikio Onai, Hajime Shimizu, Kanae Masuda, Akira Matsumoto, Moritoshi Aso:
Architecture and Evaluation of a Reduction-Based Parallel Inference Machine: PIM-R. LP 1985: 1-12
Coauthor Index
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