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ORCIDSamah Mohamed Saeed
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2020 – today
- 2024
[j15]Vedika Saravanan
, Samah Mohamed Saeed:
Noise Adaptive Quantum Circuit Mapping Using Reinforcement Learning and Graph Neural Network. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(5): 1374-1386 (2024)- [c27]Christian Rasmussen, Samah Mohamed Saeed:
Time-Aware Re-Synthesis for Secure Quantum Systems. HOST 2024: 1-6 - [c26]Georgios Ioannou, Gopika Kizhuvettil, Mohammad Walid Charrwi, Samah Mohamed Saeed:
Can ML-Based Reliability Models Span Quantum Hardware Boundaries? ISVLSI 2024: 607-612 - 2023
- [j14]Vedika Saravanan, Samah Mohamed Saeed:
Data-Driven Reliability Models of Quantum Circuit: From Traditional ML to Graph Neural Network. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(5): 1477-1489 (2023) - [c25]Vedika Saravanan, Mohammad Walid Charrwi, Samah Mohamed Saeed:
Revisiting Trojan Insertion Techniques for Post-Silicon Trojan Detection Evaluation. ISVLSI 2023: 1-6 - 2022
- [j13]Nikita Acharya, Miroslav Urbánek, Wibe A. de Jong, Samah Mohamed Saeed:
Test Points for Online Monitoring of Quantum Circuits. ACM J. Emerg. Technol. Comput. Syst. 18(1): 14:1-14:19 (2022) - [c24]Vedika Servanan, Samah Mohamed Saeed:
Graph Neural Networks for Idling Error Mitigation. ICCAD 2022: 139:1-139:9 - [c23]Vedika Saravanan, Samah Mohamed Saeed:
Machine Learning for Quantum Hardware Performance Assessment. ICCD 2022: 1-7 - [c22]Mohammad Walid Charrwi, Huy Phan, Bo Yuan, Samah Mohamed Saeed:
Towards Yield Improvement for AI Accelerators: Analysis and Exploration. ISVLSI 2022: 339-344 - [i3]Vedika Saravanan, Samah Mohamed Saeed:
Pauli Error Propagation-Based Gate Reschedulingfor Quantum Circuit Error Mitigation. CoRR abs/2201.12946 (2022) - 2021
- [c21]Vedika Saravanan, Samah Mohamed Saeed:
Test Data-Driven Machine Learning Models for Reliable Quantum Circuit Output. ETS 2021: 1-6 - [c20]Vedika Saravanan, Samah Mohamed Saeed:
Decomposition-Based Watermarking of Quantum Circuits. ISQED 2021: 73-78 - [c19]Nikita Acharya, Samah Mohamed Saeed:
Automated Flag Qubit Insertion for Reliable Quantum Circuit Output. ISVLSI 2021: 431-436 - 2020
- [j12]Xiaotong Cui, Samah Mohamed Saeed, Alwin Zulehner, Robert Wille, Kaijie Wu, Rolf Drechsler, Ramesh Karri:
On the Difficulty of Inserting Trojans in Reversible Computing Architectures. IEEE Trans. Emerg. Top. Comput. 8(4): 960-972 (2020) - [c18]Reginald Tetteh, Samah Mohamed Saeed:
Analysis of Test Data Tampering Attack on Manufacturing Testing. DTIS 2020: 1-6 - [c17]Nikita Acharya, Samah Mohamed Saeed:
A Lightweight Approach to Detect Malicious/Unexpected Changes in the Error Rates of NISQ Computers. ICCAD 2020: 153:1-153:9 - [c16]Nikita Acharya, Vedika Saravanan, Samah Mohamed Saeed:
An Attack on Quantum Circuits Based on the Error Rates of NISQ Systems and a Countermeasure. SVCC 2020: 109-114
2010 – 2019
- 2019
- [j11]Samah Mohamed Saeed, Nithin Mahendran, Alwin Zulehner, Robert Wille, Ramesh Karri:
Identification of Synthesis Approaches for IP/IC Piracy of Reversible Circuits. ACM J. Emerg. Technol. Comput. Syst. 15(3): 23:1-23:17 (2019) - [j10]Samah Mohamed Saeed, Robert Wille, Ramesh Karri:
Locking the Design of Building Blocks for Quantum Circuits. ACM Trans. Embed. Comput. Syst. 18(5s): 60:1-60:15 (2019) - [j9]Kanad Basu, Samah Mohamed Saeed, Christian Pilato, Mohammed Ashraf, Mohammed Thari Nabeel, Krishnendu Chakrabarty, Ramesh Karri:
CAD-Base: An Attack Vector into the Electronics Supply Chain. ACM Trans. Design Autom. Electr. Syst. 24(4): 38:1-38:30 (2019) - [j8]Samah Mohamed Saeed, Alwin Zulehner, Robert Wille, Rolf Drechsler, Ramesh Karri:
Reversible Circuits: IC/IP Piracy Attacks and Countermeasures. IEEE Trans. Very Large Scale Integr. Syst. 27(11): 2523-2535 (2019) - 2018
- [c15]Samah Mohamed Saeed, Xiaotong Cui, Alwin Zulehner, Robert Wille, Rolf Drechsler, Kaijie Wu, Ramesh Karri:
IC/IP piracy assessment of reversible logic. ICCAD 2018: 5 - 2017
- [j7]Samah Mohamed Saeed, Ozgur Sinanoglu:
A Comprehensive Design-for-Test Infrastructure in the Context of Security-Critical Applications. IEEE Des. Test 34(1): 57-64 (2017) - [j6]Bodhisatwa Mazumdar, Samah Mohamed Saeed, Sk Subidh Ali, Ozgur Sinanoglu:
Timing Attack and Countermeasure on NEMS Relay Based Design of Block Ciphers. IEEE Trans. Emerg. Top. Comput. 5(3): 317-328 (2017) - [c14]Samah Mohamed Saeed, Nithin Mahendran, Alwin Zulehner, Robert Wille, Ramesh Karri:
Identifying Reversible Circuit Synthesis Approaches to Enable IP Piracy Attacks. ICCD 2017: 537-540 - [i2]Samah Mohamed Saeed, Xiaotong Cui, Robert Wille, Alwin Zulehner, Kaijie Wu, Rolf Drechsler, Ramesh Karri:
Towards Reverse Engineering Reversible Logic. CoRR abs/1704.08397 (2017) - [i1]Xiaotong Cui, Samah Mohamed Saeed, Alwin Zulehner, Robert Wille, Rolf Drechsler, Kaijie Wu, Ramesh Karri:
On the Difficulty of Inserting Trojans in Reversible Computing Architectures. CoRR abs/1705.00767 (2017) - 2016
- [c13]Muhammad Yasin, Samah Mohamed Saeed, Jeyavijayan Rajendran, Ozgur Sinanoglu:
Activation of logic encrypted chips: Pre-test or post-test? DATE 2016: 139-144 - [c12]Bodhisatwa Mazumdar, Samah Mohamed Saeed, Sk Subidh Ali, Ozgur Sinanoglu:
Thwarting timing attacks on NEMS relay based designs. VTS 2016: 1-4 - 2015
- [j5]Sk Subidh Ali, Samah Mohamed Saeed, Ozgur Sinanoglu, Ramesh Karri:
Novel Test-Mode-Only Scan Attack and Countermeasure for Compression-Based Scan Architectures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 34(5): 808-821 (2015) - [c11]Samah Mohamed Saeed, Bodhisatwa Mazumdar, Sk Subidh Ali, Ozgur Sinanoglu:
Timing attack on NEMS relay based design of AES. VLSI-SoC 2015: 264-269 - 2014
- [j4]Samah Mohamed Saeed, Ozgur Sinanoglu:
Design for Testability Support for Launch and Capture Power Reduction in Launch-Off-Shift and Launch-Off-Capture Testing. IEEE Trans. Very Large Scale Integr. Syst. 22(3): 516-521 (2014) - [c10]Abishek Ramdas, Samah Mohamed Saeed, Ozgur Sinanoglu:
Slack removal for enhanced reliability and trust. DTIS 2014: 1-4 - [c9]Sk Subidh Ali, Ozgur Sinanoglu, Samah Mohamed Saeed, Ramesh Karri:
New scan attacks against state-of-the-art countermeasures and DFT. HOST 2014: 142-147 - [c8]Samah Mohamed Saeed:
DfST: Design for secure testability. ITC 2014: 1-10 - [c7]Samah Mohamed Saeed, Sk Subidh Ali, Ozgur Sinanoglu, Ramesh Karri:
Test-mode-only scan attack and countermeasure for contemporary scan architectures. ITC 2014: 1-8 - 2013
- [j3]Samah Mohamed Saeed, Ozgur Sinanoglu:
Expedited-compact architecture for average scan power reduction. IEEE Des. Test 30(3): 25-33 (2013) - [j2]Samah Mohamed Saeed, Ozgur Sinanoglu, Sobeeh Almukhaizim:
Predictive Techniques for Projecting Test Data Volume Compression. IEEE Trans. Very Large Scale Integr. Syst. 21(9): 1762-1766 (2013) - [c6]Sk Subidh Ali, Samah Mohamed Saeed, Ozgur Sinanoglu, Ramesh Karri:
Scan attack in presence of mode-reset countermeasure. IOLTS 2013: 230-231 - [c5]Sk Subidh Ali, Samah Mohamed Saeed, Ozgur Sinanoglu, Ramesh Karri:
New Scan-Based Attack Using Only the Test Mode and an Input Corruption Countermeasure. VLSI-SoC (Selected Papers) 2013: 48-68 - [c4]Sk Subidh Ali, Ozgur Sinanoglu, Samah Mohamed Saeed, Ramesh Karri:
New scan-based attack using only the test mode. VLSI-SoC 2013: 234-239 - 2012
- [j1]Samah Mohamed Saeed, Ozgur Sinanoglu:
Multi-modal response compaction adaptive to x-density variation. IET Comput. Digit. Tech. 6(2): 69-77 (2012) - [c3]Samah Mohamed Saeed, Ozgur Sinanoglu:
DfT support for launch and capture power reduction in launch-off-capture testing. ETS 2012: 1-6 - 2011
- [c2]Samah Mohamed Saeed, Ozgur Sinanoglu:
Expedited response compaction for scan power reduction. VTS 2011: 40-45 - 2010
- [c1]Samah Mohamed Saeed, Ozgur Sinanoglu:
XOR-Based Response Compactor Adaptive to X-Density Variation. Asian Test Symposium 2010: 212-217
Coauthor Index
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