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Guan-Yi Lin
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2020 – today
- 2024
- [c4]De-Qi You, Win-San Khwa, Jui-Jen Wu, Chuan-Jia Jhang, Guan-Yi Lin, Po-Jung Chen, Ting-Chien Chiu, Fang-Yi Chen, Andrew Lee, Yu-Cheng Hung, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang:
A 22nm Nonvolatile AI-Edge Processor with 21.4TFLOPS/W using 47.25Mb Lossless-Compressed-Computing STT-MRAM Near-Memory-Compute Macro. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c3]Yen-Cheng Chiu, Win-San Khwa, Chung-Yuan Li, Fang-Ling Hsieh, Yu-An Chien, Guan-Yi Lin, Po-Jung Chen, Tsen-Hsiang Pan, De-Qi You, Fang-Yi Chen, Andrew Lee, Chung-Chuan Lo, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang:
A 22nm 8Mb STT-MRAM Near-Memory-Computing Macro with 8b-Precision and 46.4-160.1TOPS/W for Edge-AI Devices. ISSCC 2023: 496-497 - 2022
- [c2]Yen-Cheng Chiu, Chia-Sheng Yang, Shih-Hsih Teng, Hsiao-Yu Huang, Fu-Chun Chang, Yuan Wu, Yu-An Chien, Fang-Ling Hsieh, Chung-Yuan Li, Guan-Yi Lin, Po-Jung Chen, Tsen-Hsiang Pan, Chung-Chuan Lo, Win-San Khwa, Ren-Shuo Liu, Chih-Cheng Hsieh, Kea-Tiong Tang, Chieh-Pu Lo, Yu-Der Chih, Tsung-Yung Jonathan Chang, Meng-Fan Chang:
A 22nm 4Mb STT-MRAM Data-Encrypted Near-Memory Computation Macro with a 192GB/s Read-and-Decryption Bandwidth and 25.1-55.1TOPS/W 8b MAC for AI Operations. ISSCC 2022: 178-180
2000 – 2009
- 2009
- [c1]Chi-Cheng Ju, Tsu-Ming Liu, Chih-Chieh Yang, Shih-Hung Lin, Kuo-Pin Lan, Chien-Hua Wu, Ting-Hsun Wei, Chi-Chin Lien, Jiun-Yuan Wu, Chih-Hao Hsiao, Te-Wei Chen, Yeh-Lin Chu, Guan-Yi Lin, Yung-Chang Chang, Kung-Sheng Lin, Chih-Ming Wang, Hue-Min Lin, Chia-Yun Cheng, Chun-Chia Chen, Chien-Hung Lin, Yung-Teng Lin, Shang-Ming Lee, Ya-Ching Yang, Yu-Lun Cheng, Chen-Chia Lee, Ming-Shiang Lai, Wen-Hua Wu, Ted Hu, Chao-Wei Tseng, Chen-Yu Hsiao, Wei-Liang Lee, Bo-Jiun Chen, Pao-Cheng Chiu, Shang-Ping Chen, Kun-Hsien Li, Kuan-Hua Chao, Chien-Ming Chen, Chuan-Cheng Hsiao, Jeffrey Ju, Wei-Hung Huang, Chi-Hui Wang, Hung-Sung Li, Evan Su, Joe Chen:
A multi-format Blu-ray player SoC in 90nm CMOS. ISSCC 2009: 152-153 - 2005
- [j1]Shih-Hao Wang, Wen-Hsiao Peng, Yuwen He, Guan-Yi Lin, Cheng-Yi Lin, Shih-Chien Chang, Chung-Neng Wang, Tihao Chiang:
A Software-Hardware Co-Implementation of MPEG-4 Advanced Video Coding (AVC) Decoder with Block Level Pipelining. J. VLSI Signal Process. 41(1): 93-110 (2005)
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last updated on 2024-10-18 19:32 CEST by the dblp team
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