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ORCIDAvinash Malik
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2020 – today
- 2024
[i11]Hongshen Yang, Avinash Malik:
Optimal market-neutral currency trading on the cryptocurrency platform. CoRR abs/2405.15461 (2024)- [i10]Hongshen Yang, Avinash Malik:
Reinforcement Learning Pair Trading: A Dynamic Scaling approach. CoRR abs/2407.16103 (2024) - 2023
- [j39]Avinash Malik
:
A comparison of machine learning and econometric models for pricing perpetual Bitcoin futures and their application to algorithmic trading. Expert Syst. J. Knowl. Eng. 40(10) (2023) - [j38]Weiyi Zhang, Zoran Salcic, Avinash Malik:
Designing, Modeling and Analysis of GALS Software Systems. IEEE Trans. Software Eng. 49(8): 3989-4003 (2023) - 2022
- [j37]Luman Wang, Avinash Malik, Partha S. Roop, Leo K. Cheng, Niranchan Paskaranandavadivel:
A framework for the design of a closed-loop gastric pacemaker for treating conduction block. Comput. Methods Programs Biomed. 216: 106652 (2022) - [j36]Manish Tewary, Zoran Salcic, Morteza Biglari-Abhari, Avinash Malik:
Compiler-assisted energy reduction of java real-time programs. Microprocess. Microsystems 89: 104436 (2022) - [j35]Manish Tewary, Zoran Salcic, Morteza Biglari-Abhari, Avinash Malik:
Energy-aware scheduling, compilation, and execution of hard-real-time multi-task Java programs. Microprocess. Microsystems 95: 104721 (2022) - [j34]Jin Woo Ro, Avinash Malik, Partha S. Roop:
High Fidelity Simulation of Hybrid Systems using Higher Order Hybrid Automata. IEEE Trans. Computers 71(7): 1668-1680 (2022) - [j33]Tommy Peng, Avinash Malik, Laura R. Bear, Mark L. Trew:
Impulse Data Models for the Inverse Problem of Electrocardiography. IEEE J. Biomed. Health Informatics 26(3): 1353-1361 (2022) - [c33]Surinder Sood, Avinash Malik, Partha S. Roop:
Robust hardware-software Co-simulation framework for design and validation of Hybrid Systems. MEMOCODE 2022: 1-11 - [c32]Surinder Sood, Avinash Malik, Partha S. Roop:
A novel approach to Real-time contract based reasoning for Hybrid Systems. MEMOCODE 2022: 1-11 - 2021
- [j32]Tommy Peng, Avinash Malik, Mark L. Trew:
Predicting drug-mediated pro-arrhythmic effects using pre-drug electrocardiograms. Biomed. Signal Process. Control. 68: 102712 (2021) - [j31]Avinash Malik:
Adaptive step size numerical integration for stochastic differential equations with discontinuous drift and diffusion. Numer. Algorithms 87(2): 849-872 (2021) - [j30]Jin Woo Ro, Partha S. Roop, Avinash Malik:
A New Safety Distance Calculation for Rear-End Collision Avoidance. IEEE Trans. Intell. Transp. Syst. 22(3): 1742-1747 (2021) - [i9]Tommy Peng, Avinash Malik, Laura Bear, Mark L. Trew:
Basis Function Based Data Driven Learning for the Inverse Problem of Electrocardiography. CoRR abs/2102.00570 (2021) - 2020
- [j29]Luman Wang, Avinash Malik, Partha S. Roop, Leo K. Cheng, Niranchan Paskaranandavadivel, Weiwei Ai:
A novel approach for model-based design of gastric pacemakers. Comput. Biol. Medicine 116: 103576 (2020) - [j28]Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Mark L. Trew:
Cardiac Electrical Modeling for Closed-Loop Validation of Implantable Devices. IEEE Trans. Biomed. Eng. 67(2): 536-544 (2020) - [j27]Surinder Sood, Avinash Malik, Partha S. Roop:
Robust Design and Validation of Cyber-physical Systems. ACM Trans. Embed. Comput. Syst. 18(6): 116:1-116:21 (2020) - [j26]Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Mark L. Trew:
Closing the Loop: Validation of Implantable Cardiac Devices With Computational Heart Models. IEEE J. Biomed. Health Informatics 24(6): 1579-1588 (2020) - [c31]Luman Wang, Avinash Malik, Partha S. Roop, Leo K. Cheng, Niranchan Paskaranandavadivel, Weiwei Ai:
Design of a closed-loop gastric pacemaker for modulating dysrhythmic conduction patterns via extracellular potentials. EMBC 2020: 2504-2507
2010 – 2019
- 2019
- [j25]Tommy Peng, Mark L. Trew, Avinash Malik:
Predictive modeling of drug effects on electrocardiograms. Comput. Biol. Medicine 108: 332-344 (2019) - [j24]Muhammad Nadeem, Zhenmin Li, Avinash Malik, Morteza Biglari-Abhari, Zoran Salcic:
Allocation and scheduling of SystemJ programs on chip multiprocessors with weighted TDMA scheduling. J. Syst. Archit. 98: 63-78 (2019) - [j23]Avinash Malik, HeeJong Park, Muhammad Nadeem, Zoran Salcic:
Memory management of safety-critical hard real-time systems designed in SystemJ. Microprocess. Microsystems 64: 101-119 (2019) - [j22]Luman Wang, Avinash Malik, Partha S. Roop, Leo K. Cheng, Niranchan Paskaranandavadivel:
A Formal Approach for Scalable Simulation of Gastric ICC Electrophysiology. IEEE Trans. Biomed. Eng. 66(12): 3320-3329 (2019) - [c30]Manish Tewary, Avinash Malik, Zoran Salcic, Morteza Biglari-Abhari:
An Energy Efficient Embedded Processor for Hard Real-Time Java Applications. ARCS 2019: 281-292 - [c29]Weiyi Zhang, Zoran Salcic, Avinash Malik:
Towards Formal Modeling and Analysis of SystemJ GALS Systems using Coloured Petri Nets. INDIN 2019: 152-159 - [c28]Jin Woo Ro, Avinash Malik, Partha S. Roop:
A compositional semantics of Simulink/Stateflow based on quantized state hybrid automata. MEMOCODE 2019: 1:1-1:11 - [c27]Ke Ren, Avinash Malik:
Recommendation Engine for Lower Interest Borrowing on Peer to Peer Lending (P2PL) Platform. WI 2019: 265-269 - [c26]Ke Ren, Avinash Malik:
Investment Recommendation System for Low-Liquidity Online Peer to Peer Lending (P2PL) Marketplaces. WSDM 2019: 510-518 - [i8]Ke Ren, Avinash Malik:
Recommendation Engine for Lower Interest Borrowing on Peer to Peer Lending (P2PL) Platform. CoRR abs/1907.11634 (2019) - 2018
- [j21]Avinash Malik, Cameron G. Walker, Michael J. O'Sullivan, Oliver Sinnen:
Satisfiability modulo theory (SMT) formulation for optimal scheduling of task graphs with communication delay. Comput. Oper. Res. 89: 113-126 (2018) - [j20]Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Sidharta Andalam, Eugene Yip, Nathan Allen, Mark L. Trew:
A Parametric Computational Model of the Action Potential of Pacemaker Cells. IEEE Trans. Biomed. Eng. 65(1): 123-130 (2018) - [j19]Eugene Yip, Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark L. Trew, Weiwei Ai, Nitish D. Patel:
Towards the Emulation of the Cardiac Conduction System for Pacemaker Validation. ACM Trans. Cyber Phys. Syst. 2(4): 32:1-32:26 (2018) - [j18]Avinash Malik, Partha S. Roop, Nathan Allen, Theo Steger:
Emulation of Cyber-Physical Systems Using IEC-61499. IEEE Trans. Ind. Informatics 14(1): 380-389 (2018) - [j17]Jin Woo Ro, Partha S. Roop, Avinash Malik, Prakash Ranjitkar:
A Formal Approach for Modeling and Simulation of Human Car-Following Behavior. IEEE Trans. Intell. Transp. Syst. 19(2): 639-648 (2018) - [c25]Tommy Peng, Mark Trew, Avinash Malik:
Parametric Modeling of Electrocardiograms using Particle Swarm optimization. EMBC 2018: 1-4 - [c24]Avinash Malik, Tommy Peng, Mark L. Trew:
A machine learning approach to reconstruction of heart surface potentials from body surface potentials. EMBC 2018: 4828-4831 - [c23]Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark Trew:
Rethinking the Validation Process for Medical Devices: A Cardiac Pacemaker Case Study. ISORC 2018: 134-137 - [c22]Muhammad Nadeem, HeeJong Park, Avinash Malik:
Bandwidth Stealing TDMA Arbitration for Real-Time Multiprocessor Applications. TENCON 2018: 1504-1509 - [i7]Avinash Malik, Tommy Peng, Mark Trew:
A machine learning approach to reconstruction of heart surface potentials from body surface potentials. CoRR abs/1802.02240 (2018) - [i6]Avinash Malik, Partha S. Roop:
Quantized State Hybrid Automata for Cyber-Physical Systems. CoRR abs/1806.05754 (2018) - 2017
- [j16]Zhenmin Li, HeeJong Park, Avinash Malik, Kevin I-Kai Wang, Zoran Salcic, Boris Kuzmin, Michael Glaß, Jürgen Teich:
Using design space exploration for finding schedules with guaranteed reaction times of synchronous programs on multi-core architecture. J. Syst. Archit. 74: 30-45 (2017) - [j15]Avinash Malik, Partha S. Roop, Sidharta Andalam, Mark Trew, Michael Mendler:
Modular Compilation of Hybrid Systems for Emulation and Large Scale Simulation. ACM Trans. Embed. Comput. Syst. 16(5s): 118:1-118:21 (2017) - [j14]Sidharta Andalam, Nathan Allen, Avinash Malik, Partha S. Roop, Mark Trew:
A Novel Emulation Model of the Cardiac Conduction System. ACM Trans. Embed. Comput. Syst. 16(5s): 157:1-157:20 (2017) - [j13]Zoran Salcic, HeeJong Park, Jürgen Teich, Avinash Malik, Muhammad Nadeem:
Noc-HMP: A Heterogeneous Multicore Processor for Embedded Systems Designed in SystemJ. ACM Trans. Design Autom. Electr. Syst. 22(4): 73:1-73:25 (2017) - [c21]Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Nathan Allen, Mark L. Trew:
An intracardiac electrogram model to bridge virtual hearts and implantable cardiac devices. EMBC 2017: 1974-1977 - [c20]Nicholas Harvey-Lees-Green, Morteza Biglari-Abhari, Avinash Malik, Zoran A. Salcic:
A Dynamic Memory Management Unit for Real Time Systems. ISORC 2017: 84-91 - [c19]Hammond A. Pearce, Matthew M. Y. Kuo, Nathan Allen, Partha S. Roop, Avinash Malik:
Simulation of cyber-physical systems using IEC61499. MEMOCODE 2017: 136-145 - [i5]Weiwei Ai, Nitish D. Patel, Partha S. Roop, Avinash Malik, Nathan Allen, Mark L. Trew:
An intracardiac electrogram model to bridge virtual hearts and implantable cardiac devices. CoRR abs/1703.01107 (2017) - 2016
- [j12]Andrew Anderson, Avinash Malik, David Gregg:
Automatic Vectorization of Interleaved Data Revisited. ACM Trans. Archit. Code Optim. 12(4): 50:1-50:25 (2016) - [j11]Long Cheng, Avinash Malik, Spyros Kotoulas, Tomas E. Ward, Georgios Theodoropoulos:
Fast Compression of Large Semantic Web Data Using X10. IEEE Trans. Parallel Distributed Syst. 27(9): 2603-2617 (2016) - [j10]HeeJong Park, Zhenmin Li, Avinash Malik, Zoran A. Salcic:
Times Square - Marriage of Real-Time and Logical-Time in GALS and Synchronous Languages. J. Signal Process. Syst. 84(1): 163-180 (2016) - [c18]Sidharta Andalam, Avinash Malik, Partha S. Roop, Mark L. Trew:
Hybrid Automata Model of the Heart for Formal Verification of Pacemakers. ARCH@CPSWeek 2016: 9-17 - [c17]Nathan Allen, Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark Trew, Nitish D. Patel:
Modular code generation for emulating the electrical conduction system of the human heart. DATE 2016: 648-653 - [c16]Sidharta Andalam, Harshavardhan Ramanna, Avinash Malik, Partha S. Roop, Nitish D. Patel, Mark L. Trew:
Hybrid automata models of cardiac ventricular electrophysiology for real-time computational applications. EMBC 2016: 5595-5598 - [i4]Eugene Yip, Sidharta Andalam, Partha S. Roop, Avinash Malik, Mark Trew, Weiwei Ai, Nitish D. Patel:
Towards the Emulation of the Cardiac Conduction System for Pacemaker Testing. CoRR abs/1603.05315 (2016) - 2015
- [j9]HeeJong Park, Avinash Malik, Zoran A. Salcic:
Compiling and verifying SC-SystemJ programs for safety-critical reactive systems. Comput. Lang. Syst. Struct. 44: 251-282 (2015) - [j8]Avinash Malik, David Gregg:
Heuristics on Reachability Trees for Bicriteria Scheduling of Stream Graphs on Heterogeneous Multiprocessor Architectures. ACM Trans. Embed. Comput. Syst. 14(2): 23:1-23:26 (2015) - [j7]HeeJong Park, Avinash Malik, Zoran A. Salcic:
Scheduling Globally Asynchronous Locally Synchronous Programs for Guaranteed Response Times. ACM Trans. Design Autom. Electr. Syst. 20(3): 40:1-40:25 (2015) - [c15]Jin Woo Ro, Partha S. Roop, Avinash Malik:
Schedule Synthesis for Time-Triggered Multi-hop Wireless Networks with Retransmissions. ISORC 2015: 94-101 - [c14]Dez Packwood, Manu Sharma, Ding Ding, HeeJong Park, Zoran A. Salcic, Avinash Malik, Kevin I-Kai Wang:
FPGA-based Mixed-Criticality Execution Platform for SystemJ and the Internet of Industrial Things. ISORC 2015: 174-181 - [c13]Zhenmin Li, Avinash Malik, Zoran A. Salcic:
Reducing Worst Case Reaction Time of Synchronous Programs on Chip-multiprocessors with Application-Specific TDMA Scheduling. JTRES 2015: 11:1-11:9 - [i3]Avinash Malik, Partha S. Roop:
A unified framework for modeling and implementation of hybrid systems with synchronous controllers. CoRR abs/1501.05936 (2015) - [i2]Avinash Malik, Partha S. Roop, Sidharta Andalam, Eugene Yip, Mark Trew:
A synchronous rendering of hybrid systems for designing Plant-on-a-Chip (PoC). CoRR abs/1510.04336 (2015) - 2014
- [c12]HeeJong Park, Avinash Malik, Zoran A. Salcic:
WYPIWYE automation systems - An intelligent manufacturing system case study. ETFA 2014: 1-8 - [c11]Aravind Vasudevan, Avinash Malik, David Gregg:
An improved simulated annealing heuristic for static partitioning of task graphs onto heterogeneous architectures. ICPADS 2014: 95-102 - [c10]HeeJong Park, Avinash Malik, Muhammad Nadeem, Zoran A. Salcic:
The Cardiac Pacemaker: SystemJ versus Safety Critical Java. JTRES 2014: 37 - [c9]Zhenmin Li, Avinash Malik, Zoran A. Salcic:
TACO: A scalable framework for timing analysis and code optimization of synchronous programs. RTCSA 2014: 1-8 - [c8]HeeJong Park, Avinash Malik, Zoran A. Salcic:
Times square - marriage of real-time and logical-time in GALS and synchronous languages. RTCSA 2014: 1-10 - [c7]Wei-Tsun Sun, Zoran A. Salcic, Alain Girault, Avinash Malik:
libDGALS: A library-based approach to design dynamic GALS systems. SIES 2014: 104-111 - [i1]Long Cheng, Avinash Malik, Spyros Kotoulas, Tomas E. Ward, Georgios Theodoropoulos:
Scalable RDF Data Compression using X10. CoRR abs/1403.2404 (2014) - 2013
- [j6]Avinash Malik, David Gregg:
Orchestrating stream graphs using model checking. ACM Trans. Archit. Code Optim. 10(3): 19:1-19:25 (2013) - [j5]Zoran Salcic, Avinash Malik:
GALS-HMP: A heterogeneous multiprocessor for embedded applications. ACM Trans. Embed. Comput. Syst. 12(1s): 58:1-58:26 (2013) - [c6]Servesh Muralidharan, Aravind Vasudevan, Avinash Malik, David Gregg:
Heterogeneous Multiconstraint Application Partitioner (HMAP). TrustCom/ISPA/IUCC 2013: 999-1007 - [c5]HeeJong Park, Zoran Salcic, Kevin I-Kai Wang, Udayanto Dwi Atmojo, Wei-Tsun Sun, Avinash Malik:
A New Design Paradigm for Designing Reactive Pervasive Concurrent Systems with an Ambient Intelligence Example. TrustCom/ISPA/IUCC 2013: 1188-1197 - 2012
- [j4]Avinash Malik, Zoran Salcic, Christopher Chong, Salman Javed:
System-level approach to the design of a smart distributed surveillance system using systemj. ACM Trans. Embed. Comput. Syst. 11(4): 77:1-77:24 (2012) - [j3]Avinash Malik, Alain Girault, Zoran Salcic:
Formal Semantics, Compilation and Execution of the GALS Programming Language DSystemJ. IEEE Trans. Parallel Distributed Syst. 23(7): 1240-1254 (2012) - 2011
- [c4]Avinash Malik, Alain Girault, Zoran Salcic:
A GALS Language for Dynamic Distributed and Reactive Programs. ACSD 2011: 173-182 - 2010
- [j2]Avinash Malik, Zoran Salcic, Partha S. Roop, Alain Girault:
SystemJ: A GALS language for system level design. Comput. Lang. Syst. Struct. 36(4): 317-344 (2010) - [c3]Wei-Tsun Sun, Zoran Salcic, Avinash Malik:
LibGALS: a library for GALS systems design and modeling. ASP-DAC 2010: 107-112
2000 – 2009
- 2009
- [j1]Avinash Malik, Zoran A. Salcic, Partha S. Roop:
SystemJ compilation using the tandem virtual machine approach. ACM Trans. Design Autom. Electr. Syst. 14(3): 34:1-34:37 (2009) - [c2]Avinash Malik, Zoran A. Salcic, Alain Girault, Adam Walker, Sung Chul Lee:
A customizable multiprocessor for Globally Asynchronous Locally Synchronous execution. JTRES 2009: 120-129 - 2008
- [c1]Avinash Malik, Zoran Salcic, Partha S. Roop:
Tandem virtual machine - An efficient execution platform for GALS language SystemJ. ACSAC 2008: 1-8
Coauthor Index
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last updated on 2024-08-25 19:11 CEST by the dblp team
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