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Rui Bai 0001
Person information
- affiliation: PhotonIC Technologies Inc., Shanghai, China
- affiliation (PhD 2014): Oregon State University, Corvallis, OR, USA
Other persons with the same name
- Rui Bai — disambiguation page
- Rui Bai 0002 — Liaoning University of Technology, School of Electrical Engineering, Jinzhou, China (and 1 more)
- Rui Bai 0003 — Hangzhou Dianzi University, School of Computer Science and Technology, Hangzhou, China (and 1 more)
- Rui Bai 0004 — Xiamen University, School of Management, China Institute for Studies in Energy Policy, Xiamen, China
- Rui Bai 0005 — China University of Mining and Technology, School of Environment and Spatial Informatics, Xuzhou, China
- Rui Bai 0006 — Northwestern Polytechnical University, School of Electronics and Information, Xi'an, China
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2020 – today
- 2023
- [j8]Shenglong Zhuo, Tao Xia, Lei Zhao, Miao Sun, Yifan Wu, Lei Wang, Hengwei Yu, Jiqing Xu, Jier Wang, Zhihong Lin, Yuan Li, Lei Qiu, Rui Bai, Xuefeng Chen, Patrick Yin Chiang:
Solid-State dToF LiDAR System Using an Eight-Channel Addressable, 20-W/Ch Transmitter, and a 128 × 128 SPAD Receiver With SNR-Based Pixel Binning and Resolution Upscaling. IEEE J. Solid State Circuits 58(3): 757-770 (2023) - [c12]Yifan Wu, Sifan Zhou, Miao Sun, Tao Xia, Jian Qian, Lei Wang, Shi Shi, Lebei Cui, Chill Wang, Yuan Li, Hengwei Yu, Zhihong Lin, Lei Qiu, Yajie Qin, Min Sun, Rui Bai, Xuefeng Chen, Patrick Yin Chiang, Shenglong Zhuo:
dToF LIDAR System Using Addressable Multi-Channel VCSEL Transmitter, 128x80 SPAD Sensor, and ML-Based Object Detection for Adaptive Beam-Steering. CICC 2023: 1-2 - 2022
- [c11]Shenglong Zhuo, Lei Zhao, Tao Xia, Lei Wang, Shi Shi, Yifan Wu, Chang Liu, Chill Wang, Yuwei Wang, Yuan Li, Hengwei Yu, Jiqing Xu, Aaron Wang, Zhihong Lin, Yun Chen, Rui Bai, Xuefeng Chen, Patrick Yin Chiang:
Solid-State dToF LiDAR System Using an Eight-Channel Addressable, 20W/Ch Transmitter, and a 128x128 SPAD Receiver with SNR-Based Pixel Binning and Resolution Upscaling. CICC 2022: 1-2 - [c10]Shenglong Zhuo, Yuwei Wang, Tao Xia, Yifan Wu, Lichun Xie, Wei Zheng, Zhihong Lin, Miao Sun, Lei Zhao, Yajie Qin, Rui Bai, Patrick Yin Chiang:
An Integrated 200MHz 4A Pulsed Laser Driver with DLL-Based Time Interpolator for Indirect Time-of-Flight Applications. ISCAS 2022: 3493-3497 - 2021
- [j7]Juncheng Wang, Xuefeng Chen, Rui Bai, Patrick Yin Chiang, Quan Pan:
A 4 × 10 Gb/s Adaptive Optical Receiver Utilizing Current-Reuse and Crosstalk-Remove. IEEE Trans. Very Large Scale Integr. Syst. 29(12): 2110-2118 (2021) - 2020
- [c9]Xin Wang, Yi Peng, Yuanxi Zhang, Tao Xia, Yifan Wu, Juncheng Wang, Lei Wang, Liujia Song, Lei Zhao, Shenglong Zhuo, Quan Pan, Xuefeng Chen, Patrick Yin Chiang, Rui Bai:
PAM-X™: A 25Gb/s-PAM4 Optical Transceiver Chipset for 5G Optical Front-Haul. OFC 2020: 1-3
2010 – 2019
- 2019
- [j6]Juncheng Wang, Quan Pan, Yajie Qin, Xuefeng Chen, Shang Hu, Rui Bai, Xin Wang, Yaxin Cai, Tao Xia, Yuanxi Zhang, Jianxu Ma, Nan Qi, Patrick Yin Chiang:
A Fully Integrated 25 Gb/s Low-Noise TIA+CDR Optical Receiver Designed in 40-nm-CMOS. IEEE Trans. Circuits Syst. II Express Briefs 66-II(10): 1698-1702 (2019) - [c8]Shang Hu, Tingyu Yao, Bozhi Yin, Chunyu Song, Lei Zhao, Juncheng Wang, Lei Wang, Rui Bai, Xin Wang, Tao Xia, Yi Peng, Binbin Yao, Yuan Li, Xuefeng Chen, Quan Pan, Nan Qi, Patrick Yin Chiang:
A 50Gb/s PAM-4 Retimer-CDR + VCSEL Driver with Asymmetric Pulsed Pre-Emphasis Integrated into a Single CMOS Die. OFC 2019: 1-3 - 2018
- [c7]Juncheng Wang, Xuefeng Chen, Shang Hu, Yaxin Cai, Rui Bai, Xin Wang, Yuanxi Zhang, Shenglong Zhuo, Chang Liu, Bozhi Yin, Jianxu Ma, Hao Yan, Jiangao Xuan, Milton Lu, Tao Xia, Nan Qi, Patrick Yin Chiang:
A Fully-Integrated 25Gb/s Low-Noise TIA+CDR Optical Receiver designed in 40nm-CMOS. A-SSCC 2018: 67-68 - [c6]Chang Liu, Bozhi Yin, Tingyu Yao, Nan Qi, Dan Li, Jingbo Shi, Juncheng Wang, Hu Shang, Rui Bai, Patrick Yin Chiang:
A 50Gb/s-PAM4 CDR with On-Chip Eye Opening Monitor for Reference-Level and Clock-Sampling Adaptation. OFC 2018: 1-3 - 2017
- [c5]Nan Qi, Yuhang Kang, Qipeng Lin, Jianxu Ma, Jingbo Shi, Bozhi Yin, Chang Liu, Rui Bai, Shang Hu, Juncheng Wang, Jiangbing Du, Lin Ma, Zuyuan He, Ming Liu, Feng Zhang, Patrick Yin Chiang:
A 51Gb/s, 320mW, PAM4 CDR with baud-rate sampling for high-speed optical interconnects. A-SSCC 2017: 89-92 - 2016
- [j5]Kunzhi Yu, Cheng Li, Hao Li, Alex Titriku, Ayman Shafik, Binhao Wang, Zhongkai Wang, Rui Bai, Chin-Hui Chen, Marco Fiorentino, Patrick Yin Chiang, Samuel Palermo:
A 25 Gb/s Hybrid-Integrated Silicon Photonic Source-Synchronous Receiver With Microring Wavelength Stabilization. IEEE J. Solid State Circuits 51(9): 2129-2141 (2016) - 2015
- [c4]Kunzhi Yu, Hao Li, Cheng Li, Alex Titriku, Ayman Shafik, Binhao Wang, Zhongkai Wang, Rui Bai, Chin-Hui Chen, Marco Fiorentino, Patrick Yin Chiang, Samuel Palermo:
22.4 A 24Gb/s 0.71pJ/b Si-photonic source-synchronous receiver with adaptive equalization and microring wavelength stabilization. ISSCC 2015: 1-3 - 2014
- [j4]Cheng Li, Rui Bai, Ayman Shafik, Ehsan Zhian Tabasy, Binhao Wang, Geng Tang, Chao Ma, Chin-Hui Chen, Zhen Peng, Marco Fiorentino, Raymond G. Beausoleil, Patrick Chiang, Samuel Palermo:
Silicon Photonic Transceiver Circuits With Microring Resonator Bias-Based Wavelength Stabilization in 65 nm CMOS. IEEE J. Solid State Circuits 49(6): 1419-1436 (2014) - [c3]Rui Bai, Samuel Palermo, Patrick Yin Chiang:
2.5 A 0.25pJ/b 0.7V 16Gb/s 3-tap decision-feedback equalizer in 65nm CMOS. ISSCC 2014: 46-47 - [c2]Hao Li, Shuai Chen, Liqiong Yang, Rui Bai, Weiwu Hu, Freeman Y. Zhong, Samuel Palermo, Patrick Yin Chiang:
A 0.8V, 560fJ/bit, 14Gb/s injection-locked receiver with input duty-cycle distortion tolerable edge-rotating 5/4X sub-rate CDR in 65nm CMOS. VLSIC 2014: 1-2 - 2013
- [j3]Young-Hoon Song, Rui Bai, Kangmin Hu, Noah Hae-Woong Yang, Patrick Yin Chiang, Samuel Palermo:
A 0.47-0.66 pJ/bit, 4.8-8 Gb/s I/O Transceiver in 65 nm CMOS. IEEE J. Solid State Circuits 48(5): 1276-1289 (2013) - [c1]Cheng Li, Rui Bai, Ayman Shafik, Ehsan Zhian Tabasy, Geng Tang, Chao Ma, Chin-Hui Chen, Zhen Peng, Marco Fiorentino, Patrick Chiang, Samuel Palermo:
A ring-resonator-based silicon photonics transceiver with bias-based wavelength stabilization and adaptive-power-sensitivity receiver. ISSCC 2013: 124-125 - 2012
- [j2]Kangmin Hu, Rui Bai, Tao Jiang, Chao Ma, Ahmed Ragab, Samuel Palermo, Patrick Yin Chiang:
0.16-0.25 pJ/bit, 8 Gb/s Near-Threshold Serial Link Receiver With Super-Harmonic Injection-Locking. IEEE J. Solid State Circuits 47(8): 1842-1853 (2012) - 2011
- [j1]Rui Bai, Jingguang Wang, Lingli Xia, Feng Zhang, Zongren Yang, Weiwu Hu, Patrick Chiang:
Sinusoidal Clock Sampling for Multigigahertz ADCs. IEEE Trans. Circuits Syst. I Regul. Pap. 58-I(12): 2808-2815 (2011)
Coauthor Index
aka: Patrick Yin Chiang
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