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ORCIDTuomas Järvinen
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2000 – 2009
- 2007
[j2]Tuomas Järvinen, Perttu Salmela, Harri Sorokin, Jarmo Takala
:
Stride Permutation Networks for Array Processors. J. VLSI Signal Process. 49(1): 51-71 (2007)- 2006
- [c13]Tuomas Järvinen, Perttu Salmela, Konsta Punkka, Jarmo Takala:
Evaluation of stride permutation networks. ISCAS 2006 - [c12]Perttu Salmela, Pekka Jääskeläinen, Tuomas Järvinen, Jarmo Takala:
Software Pipelining Support for Transport Triggered Architecture Processors. SAMOS 2006: 237-247 - 2005
- [j1]Tuomas Järvinen, Perttu Salmela, Teemu Sipilä, Jarmo Takala:
Systematic approach for path metric access in Viterbi decoders. IEEE Trans. Commun. 53(5): 755-759 (2005) - [c11]Perttu Salmela, Tuomas Järvinen, Teemu Sipilä, Jarmo Takala:
256-State Rate 1/2 Viterbi Decoder on TTA Processor. ASAP 2005: 370-378 - [c10]Tuomas Järvinen, Perttu Salmela, Panu Hämäläinen, Jarmo Takala:
Efficient byte permutation realizations for compact AES implementations. EUSIPCO 2005: 1-4 - 2004
- [c9]Tuomas Järvinen, Perttu Salmela, Harri Sorokin, Jarmo Takala:
Stride Permutation Networks for Array Processors. ASAP 2004: 376-386 - [c8]Tuomas Järvinen, Jarmo Takala:
Register-Based Permutation Networks for Stride Permutations. SAMOS 2004: 108-117 - 2003
- [c7]Jarmo Takala, Tuomas Järvinen, Harri Sorokin:
Conflict-free parallel memory access scheme for FFT processors. ISCAS (4) 2003: 524-527 - [c6]Perttu Salmela, Tuomas Järvinen, Teemu Sipilä, Jarmo Takala:
On allocation of turbo decoder iterations. PIMRC 2003: 157-160 - [c5]Perttu Salmela, Tuomas Järvinen, Teemu Sipilä, Jarmo Takala:
Parallel memory access in turbo decoders. PIMRC 2003: 2157-2161 - [c4]Tuomas Järvinen, Perttu Salmela, Teemu Sipilä, Jarmo Takala:
In-Place Storage of Path Metrics in Viterbi Decoders. VLSI-SOC 2003: 295-300 - 2002
- [c3]Jarmo Takala, Tuomas Järvinen, Jari Nikara:
Register-based reordering networks for matrix transpose. ISCAS (4) 2002: 874-877 - 2001
- [c2]Jarmo Takala, Tuomas Järvinen, Perttu Salmela, David Akopian:
Multi-port interconnection networks for radix-R algorithms. ICASSP 2001: 1177-1180 - [c1]Tuomas Järvinen, Jarmo Takala, David Akopian, Jukka Saarinen:
Register-based multi-port perfect shuffle networks. ISCAS (4) 2001: 306-309
Coauthor Index
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