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ORCIDStefan Metzlaff
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2010 – 2019
- 2014
[j4]Stefan Metzlaff, Theo Ungerer:
A comparison of instruction memories from the WCET perspective. J. Syst. Archit. 60(5): 452-466 (2014)- [c7]Florian Haas, Sebastian Weis, Stefan Metzlaff, Theo Ungerer:
Exploiting Intel TSX for fault-tolerant execution in safety-critical systems. DFT 2014: 197-202 - 2013
- [j3]Marco Paolieri, Jörg Mische, Stefan Metzlaff, Mike Gerdes, Eduardo Quiñones
, Sascha Uhrig, Theo Ungerer, Francisco J. Cazorla:
A hard real-time capable multi-core SMT processor. ACM Trans. Embed. Comput. Syst. 12(3): 79:1-79:26 (2013) - [c6]Stefan Metzlaff, Sebastian Weis, Theo Ungerer:
Leveraging transactional memory for a predictable execution of applications composed of hard real-time and best-effort tasks. RTNS 2013: 45-54 - 2012
- [b1]Stefan Metzlaff:
Analysable instruction memories for hard real-time systems. University of Augsburg, 2012, pp. 1-296 - [c5]Stefan Metzlaff, Theo Ungerer:
Replacement Policies for a Function-Based Instruction Memory: A Quantification of the Impact on Hardware Complexity and WCET Estimates. ECRTS 2012: 112-121 - [c4]Stefan Metzlaff, Theo Ungerer:
Impact of Instruction Cache and Different Instruction Scratchpads on the WCET Estimate. HPCC-ICESS 2012: 1442-1449 - 2011
- [j2]Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer:
RTOS support for execution of parallelized hard real-time tasks on the MERASA multi-core processor. Comput. Syst. Sci. Eng. 26(6) (2011) - [c3]Stefan Metzlaff, Irakli Guliashvili, Sascha Uhrig, Theo Ungerer:
A Dynamic Instruction Scratchpad Memory for Embedded Processors Managed by Hardware. ARCS 2011: 122-134 - 2010
- [j1]Theo Ungerer, Francisco J. Cazorla, Pascal Sainrat, Guillem Bernat, Zlatko Petrov, Christine Rochange, Eduardo Quiñones, Mike Gerdes, Marco Paolieri, Julian Wolf, Hugues Cassé, Sascha Uhrig, Irakli Guliashvili, Michael Houston, Florian Kluge, Stefan Metzlaff, Jörg Mische:
Merasa: Multicore Execution of Hard Real-Time Applications Supporting Analyzability. IEEE Micro 30(5): 66-75 (2010) - [c2]Julian Wolf, Mike Gerdes, Florian Kluge, Sascha Uhrig, Jörg Mische, Stefan Metzlaff, Christine Rochange, Hugues Cassé, Pascal Sainrat, Theo Ungerer:
RTOS Support for Parallel Execution of Hard Real-Time Applications on the MERASA Multi-core Processor. ISORC 2010: 193-201
2000 – 2009
- 2008
- [c1]Stefan Metzlaff, Sascha Uhrig, Jörg Mische, Theo Ungerer:
Predictable dynamic instruction scratchpad for simultaneous multithreaded processors. MEDEA@PACT 2008: 38-45
Coauthor Index
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