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ORCIDGaston Cambon
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2000 – 2009
- 2007
[c22]Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon:
Technological hybridization for efficient runtime reconfigurable FPGAs. ISVLSI 2007: 29-34- 2006
- [c21]Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon:
Magnetic tunnelling junction based FPGA. FPGA 2006: 123-130 - [c20]Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon, Jürgen Becker:
Dynamic Hardware Multiplexing: Improving Adaptability with a Run Time Reconfiguration Manager. ISVLSI 2006: 251-256 - [c19]Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon:
New non-volatile FPGA concept using Magnetic Tunneling Junction. ISVLSI 2006: 269-276 - [c18]Nicolas Bruchon, Lionel Torres, Gilles Sassatelli, Gaston Cambon:
Remanent SRAM Structure for Runtime Reconfigurable FPGA. ReCoSoC 2006: 124-130 - 2005
- [j3]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny:
Méthode de caractérisation des architectures d'accélérateurs flexibles pour systèmes sur puce. Tech. Sci. Informatiques 24(6): 725-755 (2005) - [c17]Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon:
Dynamic hardware multiplexing for coarse grain reconfigurable architectures. FPGA 2005: 270 - [c16]Nicolas Bruchon, Gaston Cambon, Lionel Torres, Gilles Sassatelli:
Magnetic remanent memory structures for dynamically reconfigurable fine grain FPGA. FPL 2005: 687-690 - [c15]Pascal Benoit, Jürgen Becker, Michel Robert, Lionel Torres, Gilles Sassatelli, Gaston Cambon:
Run-Time Scheduling for Random Multi-Tasking in Reconfigurable Coprocessors. FPL 2005: 703-706 - [c14]Pascal Benoit, Lionel Torres, Gilles Sassatelli, Michel Robert, Gaston Cambon:
Automatic Task Scheduling / Loop Unrolling using Dedicated RTR Controllers in Coarse Grain Reconfigurable Architectures. IPDPS 2005 - [c13]Nicolas Bruchon, Gaston Cambon, Lionel Torres, Gilles Sassatelli:
Non-volatile SRAM-FPGA based on magnetic tunnelling junction. ReCoSoC 2005: 113-120 - [c12]Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes:
A new hardware countermeasure for masking power signatures of crypto cores. ReCoSoC 2005: 169-176 - [c11]Daniel Mesquita, Jean-Denis Techer, Lionel Torres, Gilles Sassatelli, Gaston Cambon, Michel Robert, Fernando Moraes
:
Current mask generation: a transistor level security against DPA attacks. SBCCI 2005: 115-120 - 2004
- [c10]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon:
Metrics for Digital Signal Processing Architectures Characterization: Remanence and Scalability. SAMOS 2004: 128-137 - 2003
- [c9]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Michel Robert, Gaston Cambon, Didier Demigny:
A Novel Approach for Architectural Model Characterization. An Example through the Systolic Ring. FPL 2003: 722-732 - [c8]Pascal Benoit, Gilles Sassatelli, Lionel Torres, Didier Demigny, Michel Robert, Gaston Cambon:
Metrics for Reconfigurable Architectures Characterization: Remanence and Scalability. IPDPS 2003: 176 - 2002
- [c7]Gilles Sassatelli, Lionel Torres, Pascal Benoit, Thierry Gil, Camille Diou, Gaston Cambon, Jérôme Galy:
Highly Scalable Dynamically Reconfigurable Systolic Ring-Architecture for DSP Applications. DATE 2002: 553-558 - 2001
- [c6]Gilles Sassatelli, Lionel Torres, Jérôme Galy, Gaston Cambon, Camille Diou:
The Systolic Ring: A Dynamically Reconfigurable Architecture for Embedded Systems. FPL 2001: 409-419 - [c5]Gilles Sassatelli, Lionel Torres, Pascal Benoit, Gaston Cambon, Michel Robert, Jérôme Galy:
Dynamically Reconfigurable Architectures for Digital Signal Processing Applications. VLSI-SOC 2001: 63-74 - [c4]Gilles Sassatelli, Gaston Cambon, Jérôme Galy, Lionel Torres:
A Dynamically Reconfigurable Architecture for Embedded Systems. IEEE International Workshop on Rapid System Prototyping 2001: 32-37
1990 – 1999
- 1999
- [c3]Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon:
Fast Prototyping: A Case Study - The JPEG Compression Algorithm. IEEE International Workshop on Rapid System Prototyping 1999: 87- - 1996
- [c2]Sébastien Pillement, Lionel Torres, Michel Robert, Gaston Cambon:
Concurrent Design of Hardware/Software Dedicated Systems. FPL 1996: 410-414 - 1992
- [j2]Michel Renovell, Gaston Cambon:
Electrical analysis and modeling of floating-gate fault. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 11(11): 1450-1458 (1992) - [c1]C. Counil, Gaston Cambon:
A functional BIST approach for FIR digital filters. VTS 1992: 90-95
1980 – 1989
- 1985
- [j1]Michel Renovell, Gaston Cambon, Daniel Auvergne:
FSPICE: a tool for fault modelling in MOS circuits. Integr. 3(3): 245-255 (1985)
Coauthor Index
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