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2020 – today
- 2020
[c12]Charles Augustine, Somnath Paul, Turbo Majumder, James W. Tschanz, Muhammad M. Khellah
, Vivek De:
2X-Bandwidth Burst 6T-SRAM for Memory Bandwidth Limited Workloads. VLSI Circuits 2020: 1-2- [c11]Somnath Paul, Turbo Majumder, Charles Augustine, Andres F. Malavasi, S. Usirikayala, Raghavan Kumar, Jisna Kollikunnel, S. Chhabra, Satish Yada, M. L. Barajas, Carlos Ornelas, Dan Lake, Muhammad M. Khellah, Jim Tschanz, Vivek De:
A 0.05pJ/Pixel 70fps FHD 1Meps Event-Driven Visual Data Processing Unit. VLSI Circuits 2020: 1-2
2010 – 2019
- 2017
- [j8]Somnath Paul, Vinayak Honkote, Ryan Gary Kim, Turbo Majumder, Paolo A. Aseron, Vaughn Grossnickle, Robert Sankman, Debendra Mallik, Tao Wang, Sriram R. Vangal, James W. Tschanz, Vivek De:
A Sub-cm3 Energy-Harvesting Stacked Wireless Sensor Node Featuring a Near-Threshold Voltage IA-32 Microcontroller in 14-nm Tri-Gate CMOS for Always-ON Always-Sensing Applications. IEEE J. Solid State Circuits 52(4): 961-971 (2017) - [j7]Xian Li, Karthi Duraisamy, Joe Baylon, Turbo Majumder, Guopeng Wei, Paul Bogdan, Deukhyoun Heo, Partha Pratim Pande:
A Reconfigurable Wireless NoC for Large Scale Microbiome Community Analysis. IEEE Trans. Computers 66(10): 1653-1666 (2017) - 2016
- [j6]Xian Li, Karthi Duraisamy, Paul Bogdan, Turbo Majumder, Partha Pratim Pande:
Network-on-Chip-Enabled Multicore Platforms for Parallel Model Predictive Control. IEEE Trans. Very Large Scale Integr. Syst. 24(9): 2837-2850 (2016) - [c10]Somnath Paul, Vinayak Honkote, Ryan Gary Kim, Turbo Majumder, Paolo A. Aseron, Vaughn Grossnickle, Robert Sankman, Debendra Mallik, Sandeep Jain, Sriram R. Vangal, James W. Tschanz, Vivek De:
An energy harvesting wireless sensor node for IoT systems featuring a near-threshold voltage IA-32 microcontroller in 14nm tri-gate CMOS. VLSI Circuits 2016: 1-2 - 2015
- [c9]Turbo Majumder, Partha Pratim Pande, Ananth Kalyanaraman:
On-chip network-enabled many-core architectures for computational biology applications. DATE 2015: 259-264 - [c8]Turbo Majumder, Xian Li, Paul Bogdan, Partha Pratim Pande:
NoC-enabled multicore architectures for stochastic analysis of biomolecular reactions. DATE 2015: 1102-1107 - [c7]Abhishek Bansal, Sambhav Gupta, Turbo Majumder:
Efficient Estimation of Non-stationary Traffic Parameters on Networks-on-Chip. IPDPS Workshops 2015: 425-433 - [c6]Turbo Majumder, Manan Suri, Vinay Shekhar:
NoC router using STT-MRAM based hybrid buffers with error correction and limited flit retransmission. ISCAS 2015: 2305-2308 - [c5]Paul Bogdan, Turbo Majumder, Arvind Ramanathan, Yuankun Xue:
NoC Architectures as Enablers of Biological Discovery for Personalized and Precision Medicine. NOCS 2015: 27:1-27:11 - 2014
- [j5]Turbo Majumder, Partha Pratim Pande, Ananth Kalyanaraman:
Hardware Accelerators in Computational Biology: Application, Potential, and Challenges. IEEE Des. Test 31(1): 8-18 (2014) - [j4]Turbo Majumder, Partha Pratim Pande, Ananth Kalyanaraman:
Wireless NoC Platforms With Dynamic Task Allocation for Maximum Likelihood Phylogeny Reconstruction. IEEE Des. Test 31(3): 54-64 (2014) - 2013
- [j3]Turbo Majumder, Partha Pratim Pande, Ananth Kalyanaraman:
High-throughput, energy-efficient network-on-chip-based hardware accelerators. Sustain. Comput. Informatics Syst. 3(1): 36-46 (2013) - [c4]Turbo Majumder, Partha Pratim Pande, Ananth Kalyanaraman:
Network-on-Chip with Long-Range Wireless Links for High-Throughput Scientific Computation. IPDPS Workshops 2013: 781-790 - 2012
- [j2]Turbo Majumder, Souradip Sarkar, Partha Pratim Pande, Ananth Kalyanaraman:
NoC-Based Hardware Accelerator for Breakpoint Phylogeny. IEEE Trans. Computers 61(6): 857-869 (2012) - [j1]Turbo Majumder, Michael Edward Borgens, Partha Pratim Pande, Ananth Kalyanaraman:
On-Chip Network-Enabled Multicore Platforms Targeting Maximum Likelihood Phylogeny Reconstruction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(7): 1061-1073 (2012) - 2011
- [c3]Turbo Majumder, Partha Pratim Pande, Ananth Kalyanaraman:
Accelerating Maximum Likelihood Based Phylogenetic Kernels Using Network-on-Chip. SBAC-PAD 2011: 17-24 - 2010
- [c2]Turbo Majumder, Souradip Sarkar, Partha Pratim Pande, Ananth Kalyanaraman:
An optimized NoC architecture for accelerating TSP kernels in breakpoint median problem. ASAP 2010: 89-96 - [c1]Souradip Sarkar, Turbo Majumder, Ananth Kalyanaraman, Partha Pratim Pande:
Hardware accelerators for biocomputing: A survey. ISCAS 2010: 3789-3792
Coauthor Index
aka: Ananth Kalyanaraman
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