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Hao Yan 0002
Person information
- affiliation: Southeast University, National ASIC Center, Nanjing, China
Other persons with the same name
- Hao Yan — disambiguation page
- Hao Yan 0001 — Shanghai Jiao Tong University, School of Electronic, Information and Electrical Engineering, China (and 1 more)
- Hao Yan 0003 — MIT Media Laboratory, Cambridge, MA, USA
- Hao Yan 0004 — Central South University, Changsha, China
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2020 – today
- 2024
- [j11]Yuyang Ye, Tinghuan Chen, Yifei Gao, Hao Yan, Bei Yu, Longxing Shi:
Timing-Driven Technology Mapping Approximation Based on Reinforcement Learning. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 43(9): 2755-2768 (2024) - [j10]Yuyang Ye, Tinghuan Chen, Zicheng Wang, Hao Yan, Bei Yu, Longxing Shi:
Fast and Accurate Aging-Aware Cell Timing Model via Graph Learning. IEEE Trans. Circuits Syst. II Express Briefs 71(1): 156-160 (2024) - [c16]Shuaibo Huang, Yuyang Ye, Hao Yan, Longxing Shi:
ARS-Flow: A Design Space Exploration Flow for Accelerator-rich System based on Active Learning. ASPDAC 2024: 213-218 - [c15]Yunfan Zuo, Yuyang Ye, Hongchao Zhang, Tinghuan Chen, Hao Yan, Longxing Shi:
A Graph-Learning-Driven Prediction Method for Combined Electromigration and Thermomigration Stress on Multi-Segment Interconnects. DATE 2024: 1-6 - [c14]Jiajie Xu, Ziyue Han, Leilei Jin, Shiyang Wu, Hao Yan, Longxing Shi:
FACT: Fast and Accurate Multi-Corner Predictor for Timing Closure in Commercial EDA Flows. MLCAD 2024: 3:1-3:7 - [c13]Pinquan Li, Yunfan Zuo, Yuwei Sun, Hao Yan, Longxing Shi:
ICDaIR: Distribution-aware Static IR Drop Prediction Flow Based on Image Classification. MLCAD 2024: 4:1-4:6 - [i2]Leilei Jin, Jiajie Xu, Wenjie Fu, Hao Yan, Longxing Shi:
A Crosstalk-Aware Timing Prediction Method in Routing. CoRR abs/2403.04145 (2024) - [i1]Yuyang Ye, Peng Xu, Lizheng Ren, Tinghuan Chen, Hao Yan, Bei Yu, Longxing Shi:
Learning-driven Physically-aware Large-scale Circuit Gate Sizing. CoRR abs/2403.08193 (2024) - 2023
- [j9]Peng Cao, Tai Yang, Kai Wang, Wei Bao, Hao Yan:
Topology-Aided Multicorner Timing Predictor for Wide Voltage Design. IEEE Des. Test 40(1): 62-69 (2023) - [j8]Liang Pang, Ziqi Wang, Rui Shi, Mengyun Yao, Xiao Shi, Hao Yan, Longxin Shi:
An efficient SRAM yield analysis method based on scaled-sigma adaptive importance sampling with meta-model accelerated. Integr. 89: 155-167 (2023) - [j7]Qian Chen, Yuyang Ye, Meng Li, Hao Yan, Longxing Shi:
Optimized matrix ordering of sparse linear solver using a few-shot model for circuit simulation. Integr. 93: 102062 (2023) - [j6]Liang Pang, Mengyun Yao, Xiao Shi, Hao Yan, Longxin Shi:
CharTM: The dynamic stability characterization for memory based on tail distribution modeling. Microelectron. J. 133: 105697 (2023) - [j5]Yuyang Ye, Tinghuan Chen, Yifei Gao, Hao Yan, Bei Yu, Longxing Shi:
Aging-Aware Critical Path Selection via Graph Attention Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42(12): 5006-5019 (2023) - [c12]Rui Shi, Yunfan Zuo, Kelong Zhang, Hao Yan:
Hardware Acceleration Linear Matrix Solvor Based on FPGA. ASICON 2023: 1-4 - [c11]Yuyang Ye, Tinghuan Chen, Yifei Gao, Hao Yan, Bei Yu, Longxing Shi:
Graph-Learning-Driven Path-Based Timing Analysis Results Predictor from Graph-Based Timing Analysis. ASP-DAC 2023: 547-552 - [c10]Leilei Jin, Jiajie Xu, Wenjie Fu, Hao Yan, Xiao Shi, Ming Ling, Longxing Shi:
A Novel Delay Calibration Method Considering Interaction between Cells and Wires. DATE 2023: 1-6 - [c9]Yuyang Ye, Tinghuan Chen, Yifei Gao, Hao Yan, Bei Yu, Longxing Shi:
Fast and Accurate Wire Timing Estimation Based on Graph Learning. DATE 2023: 1-6 - [c8]Yuyang Ye, Zonghui Wang, Zun Xue, Ziqi Wang, Yifei Gao, Hao Yan:
FPGNN-ATPG: An Efficient Fault Parallel Automatic Test Pattern Generator. ACM Great Lakes Symposium on VLSI 2023: 299-304 - 2022
- [j4]Yu Gong, Hao Cai, Haige Wu, Wei Ge, Hao Yan, Zhen Wang, Longxing Shi, Bo Liu:
Quality Driven Systematic Approximation for Binary-Weight Neural Network Deployment. IEEE Trans. Circuits Syst. I Regul. Pap. 69(7): 2928-2940 (2022) - [j3]Leilei Jin, Wenjie Fu, Hao Yan, Longxing Shi:
A Statistical Cell Delay Model for Estimating the 3σ Delay by Matching Kurtosis. IEEE Trans. Circuits Syst. II Express Briefs 69(6): 2932-2936 (2022) - [j2]Xiao Shi, Hao Yan, Qiancun Huang, Chengzhen Xuan, Lei He, Longxing Shi:
A Compact High-Dimensional Yield Analysis Method using Low-Rank Tensor Approximation. ACM Trans. Design Autom. Electr. Syst. 27(2): 19:1-19:23 (2022) - 2021
- [c7]Hao Yan, Xiao Shi, Chengzhen Xuan, Peng Cao, Longxing Shi:
An Adaptive Delay Model for Timing Yield Estimation under Wide-Voltage Range. ASP-DAC 2021: 272-277 - 2020
- [j1]Xiao Shi, Hao Yan, Jinxin Wang, Jiajia Zhang, Longxing Shi, Lei He:
An Efficient Adaptive Importance Sampling Method for SRAM and Analog Yield Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39(12): 4999-5010 (2020) - [c6]Xiao Shi, Hao Yan, Chuwen Li, Jianli Chen, Longxing Shi, Lei He:
A Non-Gaussian Adaptive Importance Sampling Method for High-Dimensional and Multi-Failure-Region Yield Analysis. ICCAD 2020: 7:1-7:8
2010 – 2019
- 2019
- [c5]Leilei Jin, Wenjie Fu, Yu Zheng, Hao Yan:
A Precise Block-Based Statistical Timing Analysis with MAX Approximation Using Multivariate Adaptive Regression Splines. ASICON 2019: 1-4 - [c4]Xiao Shi, Jinlong Yan, Hao Yan, Jiajia Zhang, Jinxin Wang, Longxing Shi, Lei He:
Adaptive Low-Rank Tensor Approximation for SRAM Yield Analysis using Bootstrap Resampling. ASICON 2019: 1-4 - [c3]Xiao Shi, Hao Yan, Qiancun Huang, Jiajia Zhang, Longxing Shi, Lei He:
Meta-Model based High-Dimensional Yield Analysis using Low-Rank Tensor Approximation. DAC 2019: 150 - [c2]Xiao Shi, Hao Yan, Jiajia Zhang, Qiancun Huang, Longxing Shi, Lei He:
Efficient Yield Analysis for SRAM and Analog Circuits using Meta-Model based Importance Sampling Method. ICCAD 2019: 1-8 - [c1]Xiao Shi, Hao Yan, Jinxin Wang, Xiaofen Xu, Fengyuan Liu, Longxing Shi, Lei He:
Adaptive Clustering and Sampling for High-Dimensional and Multi-Failure-Region SRAM Yield Analysis. ISPD 2019: 139-146
Coauthor Index
aka: Longxin Shi
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last updated on 2024-11-20 20:57 CET by the dblp team
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