"A memory aware and multiplierless VLSI architecture for the complete Intra ..."

Daniel Palomino et al. (2012)

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DOI: 10.1109/ICIP.2012.6466830

access: closed

type: Conference or Workshop Paper

metadata version: 2025-03-03

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Daniel Palomino, Felipe Sampaio, Luciano Volcan Agostini, Sergio Bampi, Altamiro Amadeu Susin:
A memory aware and multiplierless VLSI architecture for the complete Intra Prediction of the HEVC emerging standard. ICIP 2012: 201-204

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