"A Reconfigurable In-SRAM Computing Architecture for DCNN Applications."

Yu-Hsien Lin et al. (2021)

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DOI: 10.1109/VLSI-DAT52063.2021.9427349

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type: Conference or Workshop Paper

metadata version: 2021-05-17

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Yu-Hsien Lin, Chi Liu, Chia-Lin Hu, Kang-Yu Chang, Jia-Yin Chen, Shyh-Jye Jou:
A Reconfigurable In-SRAM Computing Architecture for DCNN Applications. VLSI-DAT 2021: 1-2

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