"Logic Synthesis for AND-XOR-OR Type Sense-Amplifying PLA."

Hiroaki Yoshida et al. (2002)

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DOI: 10.1109/ASPDAC.2002.994912

access: closed

type: Conference or Workshop Paper

metadata version: 2022-11-14

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Hiroaki Yoshida, Hiroaki Yamaoka, Makoto Ikeda, Kunihiro Asada:
Logic Synthesis for AND-XOR-OR Type Sense-Amplifying PLA. ASP-DAC/VLSI Design 2002: 166-171

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