"An embedded sectioning scheme for multiprocessor topology-aware mapping of ..."

Shad Kirmani, JeongHyung Park, Padma Raghavan (2017)

> Home

Details and statistics

DOI: 10.1177/1094342015597082

access: closed

type: Journal Article

metadata version: 2020-03-12

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/ijhpca/KirmaniPR17
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ijhpca/KirmaniPR17
Shad Kirmani, JeongHyung Park, Padma Raghavan:
An embedded sectioning scheme for multiprocessor topology-aware mapping of irregular applications. Int. J. High Perform. Comput. Appl. 31(1): 91-103 (2017)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.