"Hardware Architecture Optimized for Iris Recognition."

Kamil Grabowski, Andrzej Napieralski (2011)

> Home

Details and statistics

DOI: 10.1109/TCSVT.2011.2147150

access: closed

type: Journal Article

metadata version: 2021-10-14

- view
  - electronic edition via DOI
  - unpaywalled version
  authority control:
- export record
  dblp key:
  - journals/tcsv/GrabowskiN11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/tcsv/GrabowskiN11
Kamil Grabowski, Andrzej Napieralski:
Hardware Architecture Optimized for Iris Recognition. IEEE Trans. Circuits Syst. Video Technol. 21(9): 1293-1303 (2011)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.